What exactly is the correct behavior of the Sound Blaster DSP reset, specifically with the status data ready bit (bit 7).

This guide: https://pdos.csail.mit.edu/6.828/2017/reading … oundBlaster.pdf and the ESS datasheets agree that one should wait for the bit to be set before expecting to read 0xAA from it. The ESS datasheets say it's only cleared by a read of the data. But at least one code example, at least one game (Stack Out), and the NT 3.x driver appear to be wairing for the bit to be cleared instead. What's going on there? How does the real hardware actually behave in that situation?