VOGONS


First post, by superfury

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When I look at the bochs' ports.lst, I see the following entries:

0044	r/w	PIT  counter 3 (PS/2, EISA)
used as fail-safe timer. generates an NMI on time out.
for user generated NMI see at 0462.

0047 w PIT control word register counter 3 (PS/2, EISA)
bit 7-6 = 00 counter 3 select
= 01 reserved
= 10 reserved
= 11 reserved
bit 5-4 = 00 counter latch command counter 3
= 01 read/write counter bits 0-7 only
= 1x reserved
bit 3-0 = 00

0048 EISA
0049 8254 timer 2, not used (counter 1)
004A EISA programmable interval timer 2
004B EISA programmable interval timer 2

I've currently implemented this as port 0x48, 0x49 and 0x4A mapping to the second PIT's timers(like ports 0x40-0x42 do for the first PIT), while port 0x4B maps to the second PIT, like the first PIT does with port 0x43. The operation of both PITs is identical. Is that correct? Or am I missing something? Also, what about port 4B being the same as 4A?

How do ports 0x44&0x47 relate to this?

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