VOGONS


First post, by vladstamate

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So I started to add support for floating point coprocessors to CAPE. Not fully done yet, but this is what I learned as I am doing it.

- I had to redo a lot of my clock accurate piping because the FPU executes and does work in parallel with the CPU. Also, the CPU does pull some weight at the beginning of a COPRO instruction by decoding and doing EA calculation (if necessary, and it knows WHEN to do it!) and then issuing reads across the bus. Then the FPU intercepts those reads and actually use the data.

- my bus unit only had one master, the CPU. That is not the case anymore when you have an FPU. The FPU can become bus master and stall the CPU from accessing the bus. I implemented this correctly too.

- the FPU is a mini CPU of sorts, because while it is lacking an EA (it uses the main CPU for that) it has a decoder, execution unit and bus interface unit. I've implemented them in the same say I do for the main CPU: low level micro-ops scripting language that emulate cycle by cycle workload.

- I am approaching this as I've done with the CPU: separate implementations (using C++ class hierarchy) for EACH FPU type. Right now only 8087 is in the works. But later when I have support for 287 and beyond if you ask for a 8087 you will get just that and not a 387 that can emulate a 8087.

- Have not looked yet at actual floating point calculations. I will not attempt to be bit accurate but I hope to honor the precision within few ULPs. I might have to write my own 80bit floating point class, but for now I will just be using "long double" and hope the compiler honors that.

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