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Optimizing x86 MMU descriptor memory access checking?

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First post, by superfury

Posted on 
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I'm currently using some simple, partly precalculated memory access checking on each memory access border(one for the base operand address, one for the highest address(if word or dword)). According to profiling, the basic descriptor check (verifylimit) takes the most time to process(of the CPU emulation).

https://bitbucket.org/superfury/unipcemu/src/ … ion.c?at=master

OPTINLINE byte verifyLimit(SEGMENT_DESCRIPTOR *descriptor, uint_64 offset)
{
	//Execute address test?
	INLINEREGISTER byte isvalid,topdown;
	topdown = descriptor->PRECALCS.topdown; //Are we a top-down segment?
	isvalid = (offset<=(uint_64)descriptor->PRECALCS.limit); //Valid address range!
	isvalid ^= topdown; //Apply expand-down data segment, if required, which reverses valid!
	isvalid &= (((offset>descriptor->PRECALCS.roof) & topdown)^1); //Limit to 16-bit/32-bit address space using topdown descriptors!
	isvalid &= 1; //Only 1-bit testing!
	return isvalid; //Are we valid?
}

Anyone knows how to optimize this?

Author of the UniPCemu emulator.
UniPCemu Git repository
UniPCemu for Android, Windows, PSP, Vita and Switch on itch.io

Reply 1 of 1, by superfury

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Rank l33t++
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Managed to optimize it a bit(with more stress on the precalcs):

OPTINLINE byte verifyLimit(SEGMENT_DESCRIPTOR *descriptor, uint_64 offset)
{
	//Execute address test?
	INLINEREGISTER byte isvalid;
	isvalid = (offset<=descriptor->PRECALCS.limit); //Valid address range!
	isvalid ^= descriptor->PRECALCS.topdown; //Apply expand-down data segment, if required, which reverses valid!
	isvalid &= ((offset>descriptor->PRECALCS.roof)^1); //Limit to 16-bit/32-bit address space using both top-down(required) and bottom-up(resulting in just the limit, which is lower or equal to the roof) descriptors!
	isvalid &= 1; //Only 1-bit testing!
	return isvalid; //Are we valid?
}

Author of the UniPCemu emulator.
UniPCemu Git repository
UniPCemu for Android, Windows, PSP, Vita and Switch on itch.io

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