VOGONS


Reply 40 of 55, by superfury

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I've just been thinking: F6F6:F7F9... Couldn't the F6 parts be data read from the floppy disk? I know that it formats the track with the fillter byte set to F6. Perhaps a buffer overflow of some kind(either by the DMA controller or by the CPU itself) when reading the sector(s) back to RAM?

So it could be a DMA malfunction, or perhaps a REP(Z/NZ) kind of overflow?
Edit: I see that the last DMA transfer from the FDC(18 sectors long) was somehow to physical address 0? The DMA page register and the address registers were loaded with 0x00 bytes, while the current address register ended up at 0x2400.
So all data in memory from physical memory location 0 to 2400h has been overwritten with the sector data read from track 0 head 1? And since those sectors have just been formatted with the 0xF6 fillter byte, it means that all that low memory has been filled with 0xF6 bytes by the FDC DMA read operation!
So any IRQ that triggers when it's complete(which it will, since the FDC completes it's operation) causes it to shift execution to F6F6:F6F6 or perhaps F6F6:anyaddress in real mode!

Why in the world would Windows 95's setup wizard setup the DMA controller for reading to physical address 0? No software in their right mind with an IVT at that address would do that? Except is there's a bug in the software?

So the issue here isn't the Floppy, but that the DMA controller is programmed for address 0 when it's going to read data to RAM after formatting the disk's first track, overwriting the real mode IVT?

Author of the UniPCemu emulator.
UniPCemu Git repository
UniPCemu for Android, Windows, PSP, Vita and Switch on itch.io

Reply 41 of 55, by superfury

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Seeing as the DMA hi/lo and page address registers are all written as 0 (since they aren't cleared in any other way), I'd assume there's some instruction that's writing 0 to their origin bytes or perhaps not write to said memory at all(uninitialized memory = BIOS leftover(which clears it during POST) = zeroed RAM)? Anyone?

Perhaps some malfunctioning MOV, REP'd instruction, PUSH or POP?

Author of the UniPCemu emulator.
UniPCemu Git repository
UniPCemu for Android, Windows, PSP, Vita and Switch on itch.io

Reply 42 of 55, by superfury

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Just checked out MS-DOS 6.22 format.com again with the formatting of the floppy.
Guess what: The exact same problem with reading sectors to memory address 0(setting DMA base and page registers to 0 for the read)!
So, if it has the same issue(besides triple faulting on it), it would actually be a faster and easier way of finding the CPU(or maybe hardware, but unlikely) bug, since it doesn't require the entire Windows 95 setup wizard to complete and get a log!

Edit: OK. Managed to set some breakpoints in UniPCemu and find out the locations that the DMA controller's channel 2(for the FDC) DMA address and page registers were written:
f000:ca5e first
f000:ca62 second
f000:ca6a page

f000:92c0 first(0)
f000:ca62 second(c)
f000:ca6a page(0)

f000:ca5e first(0)
f000:ca62 second(0)
f000:ca6a page(0)

So, the issue might be somewhere inside the BIOS itself? Or perhaps MS-DOS calling the BIOS functionality(e.g. INT 13h or something like that)...

Edit: OK. I eventually see(directly after the format track request from the BIOS) a strange interrupt being called:
INT 13h
EAX=00000412 EBX=0 ECX=1 EDX=0 ESP=000008F4 EBP=00000904 ESI=00000C54 EDI=0000034E
EIP=00001120 EFLAGS=00000202 CS=025A SS=011E DS=0070 ES=0 FS=0 GS=0 TR=0 LDTR=0

That's also the last INT 13h function that's called before the CPU resets.

So the cause is at:
025A:111E, according to my debugging. There it requests the track to be formatted using INT 13h function 05h. Directly after it, the invalid Verify sectors(INT 13h function 04h) occurs with ES:BX=0:0.
Edit: It appears that the invalid command for the verify sectors also uses the same address when it calls INT 13h?
Edit: Yay! A huge log(4.16GB) with the error hopefully somewhere in there?
Edit: This is said log: https://www.dropbox.com/s/t3ymp2827mu2yh1/deb … cleared.7z?dl=0

Anyone can see what's going wrong?
Edit: OK. The very first read is a read to address 18EC:0(length: 2 sectors), thus 18EC0 as a linear address.
Edit: The instructions following the INT 13h for that matches what it's supposed to at f000:0000ca5c, writing said data to the DMA address registers.
Edit: Then it calls function 18h of the BIOS INT 13h(set media type for format). Those parameters seem fine(setup for 80 tracks, 18 SPT, drive 0.
Edit: Then a format track command to the BIOS is issued. 12 sectors to format, track 0, head 0, drive 0, sector buffer ES:BX=70:53B=Memory address 73B.
Edit: f000:0000ca5c confirms it's using the correct buffer address, at 000c3b.
Edit: The very next INT 13h call is actually the incorrect AX=0412h, ES:BX=0:0 verify sectors command. So something above that is going incorrect?
Edit: OK. The 0 value loaded into ES is loaded a bit further up at 025a:00000e45, loading ds:[0537] with the BX value, thus generating the NULL ES:BX value.
And said BX value of 0 is generated the instruction before that, at 025a:00000e43, where it clears the BX register using a XOR BX,BX.
Edit: BX seems to be saved right before that clearing of BX(which is eventually loaded into ES), at 025a:00000e42. It's simply pushed on the stack at SS:SP=11E:08FC. It was 53B at said point.
Edit: OK. Somethings' weird with that real RAM from address c38 there? Or is it just badly logged?

025a:0000111a 8E 06 37 05 mov es,word ds:[0537]	RealRAM(r):00000c37=00( ); RAM(r):00000c37=00( ); Physical(r):00000c37=00( ); Paged(r):00000c37=00( ); RealRAM(r):00000c30=00( ); RAM(r):00000c38=00( ); Physical(r):00000c38=00( ); Paged(r):00000c38=00( )

Edit: OK. That's fine. It was a bug with the logging to the log file, wrapping the low 4 bits of the address to 3 bits instead of the correct 4 bits(the size of the cached memory address). So address *8-*F were becoming *0-*7 in the log.

It doesn't look very logical what it's doing, it's essentially making ES=BX=0 because of the clearing and writing to ds:[537]? It starts at 025a:00000e42.
So everything from 025a:00000e43 onwards seems like nonsense to me. It doesn't make any sense to run code that way for a memory access overwriting yourself and the OS's critical data which is the only possible outcome of this?

	RealRAM(p):000036c0=07(); RAM(p):000036c0=07(); Physical(p):000036c0=07(); Paged(p):000036c0=07(); Normal(p):00001120=07(); RealRAM(p):000036c1=5e(^); RAM(p):000036c1=5e(^); Physical(p):000036c1=5e(^); Paged(p):000036c1=5e(^); Normal(p):00001121=5e(^); RealRAM(p):000036c2=5b([); RAM(p):000036c2=5b([); Physical(p):000036c2=5b([); Paged(p):000036c2=5b([); Normal(p):00001122=5b([); RealRAM(p):000036c3=c3(?); RAM(p):000036c3=c3(?); Physical(p):000036c3=c3(?); Paged(p):000036c3=c3(?); Normal(p):00001123=c3(?); RealRAM(p):000036c4=e8(?); RAM(p):000036c4=e8(?); Physical(p):000036c4=e8(?); Paged(p):000036c4=e8(?); Normal(p):00001124=e8(?); RealRAM(p):000036c5=b0(?); RAM(p):000036c5=b0(?); Physical(p):000036c5=b0(?); Paged(p):000036c5=b0(?); Normal(p):00001125=b0(?); RealRAM(p):000036c6=f3(?); RAM(p):000036c6=f3(?); Physical(p):000036c6=f3(?); Paged(p):000036c6=f3(?); Normal(p):00001126=f3(?); RealRAM(p):000036c7=26(&); RAM(p):000036c7=26(&); Physical(p):000036c7=26(&); Paged(p):000036c7=26(&); Normal(p):00001127=26(&); RealRAM(p):000036c0=8a(?); RAM(p):000036c8=8a(?); Physical(p):000036c8=8a(?); Paged(p):000036c8=8a(?); Normal(p):00001128=8a(?); RealRAM(p):000036c1=45(E); RAM(p):000036c9=45(E); Physical(p):000036c9=45(E); Paged(p):000036c9=45(E); Normal(p):00001129=45(E); RealRAM(p):000036c2=04(); RAM(p):000036ca=04(); Physical(p):000036ca=04(); Paged(p):000036ca=04(); Normal(p):0000112a=04(); RealRAM(p):000036c3=c4(?); RAM(p):000036cb=c4(?); Physical(p):000036cb=c4(?); Paged(p):000036cb=c4(?); Normal(p):0000112b=c4(?); RealRAM(p):000036c4=3e(>); RAM(p):000036cc=3e(>); Physical(p):000036cc=3e(>); Paged(p):000036cc=3e(>); Normal(p):0000112c=3e(>); RealRAM(p):000036c5=19(); RAM(p):000036cd=19(); Physical(p):000036cd=19(); Paged(p):000036cd=19(); Normal(p):0000112d=19(); RealRAM(p):000036c6=01(); RAM(p):000036ce=01(); Physical(p):000036ce=01(); Paged(p):000036ce=01(); Normal(p):0000112e=01()
025a:00001120 07 pop es RealRAM(r):00001ad6=70(p); RAM(r):00001ad6=70(p); Physical(r):00001ad6=70(p); Paged(r):00001ad6=70(p); RealRAM(r):00001ad7=00( ); RAM(r):00001ad7=00( ); Physical(r):00001ad7=00( ); Paged(r):00001ad7=00( )
Registers:
EAX: 00000020 EBX: 0000053b ECX: 00000005 EDX: 00000000
ESP: 000008f6 EBP: 00000904 ESI: 00000c54 EDI: 0000034e
CS: 025a DS: 0070 ES: 0070 FS: 0000 GS: 0000 SS: 011e TR: 0000 LDTR: 0000
EIP: 00001120 EFLAGS: 00000282
CR0: 00000000 CR1: 00000000 CR2: 00000000 CR3: 00000000
DR0: 00000000 DR1: 00000000 DR2: 00000000 DR3: 00000000
DR6: 00000000 DR7: 00000000
GDTR: 00000008f466ffff IDTR: 000000000000ffff
CS descriptor: 0000930025A0FFFF
DS descriptor: 000093000700FFFF
ES descriptor: 000093000700FFFF
FS descriptor: 000093000000FFFF
GS descriptor: 000093000000FFFF
SS descriptor: 0000930011E0FFFF
TR descriptor: 000082000000FFFF
LDTR descriptor: 0000000000000000
Previous CS:EIP: 0070:00000794
FLAGSINFO: 00000000000000vr0n00odItSz0a0p1c
RealRAM(p):000036c7=26(&); RAM(p):000036cf=26(&); Physical(p):000036cf=26(&); Paged(p):000036cf=26(&); Normal(p):0000112f=26(&)
025a:00001121 5E pop si RealRAM(r):00001ad0=54(T); RAM(r):00001ad8=54(T); Physical(r):00001ad8=54(T); Paged(r):00001ad8=54(T); RealRAM(r):00001ad1=0c(); RAM(r):00001ad9=0c(); Physical(r):00001ad9=0c(); Paged(r):00001ad9=0c()
Registers:
EAX: 00000020 EBX: 0000053b ECX: 00000005 EDX: 00000000
ESP: 000008f8 EBP: 00000904 ESI: 00000c54 EDI: 0000034e
CS: 025a DS: 0070 ES: 0070 FS: 0000 GS: 0000 SS: 011e TR: 0000 LDTR: 0000
EIP: 00001121 EFLAGS: 00000282
CR0: 00000000 CR1: 00000000 CR2: 00000000 CR3: 00000000
DR0: 00000000 DR1: 00000000 DR2: 00000000 DR3: 00000000
DR6: 00000000 DR7: 00000000
GDTR: 00000008f466ffff IDTR: 000000000000ffff
CS descriptor: 0000930025A0FFFF
DS descriptor: 000093000700FFFF
ES descriptor: 000093000700FFFF
FS descriptor: 000093000000FFFF
GS descriptor: 000093000000FFFF
SS descriptor: 0000930011E0FFFF
TR descriptor: 000082000000FFFF
LDTR descriptor: 0000000000000000
FLAGSINFO: 00000000000000vr0n00odItSz0a0p1c
RealRAM(p):000036d0=38(8); RAM(p):000036d0=38(8); Physical(p):000036d0=38(8); Paged(p):000036d0=38(8); Normal(p):00001130=38(8)
025a:00001122 5B pop bx RealRAM(r):00001ad2=3b(;); RAM(r):00001ada=3b(;); Physical(r):00001ada=3b(;); Paged(r):00001ada=3b(;); RealRAM(r):00001ad3=05(); RAM(r):00001adb=05(); Physical(r):00001adb=05(); Paged(r):00001adb=05()
Registers:
EAX: 00000020 EBX: 0000053b ECX: 00000005 EDX: 00000000
ESP: 000008fa EBP: 00000904 ESI: 00000c54 EDI: 0000034e
CS: 025a DS: 0070 ES: 0070 FS: 0000 GS: 0000 SS: 011e TR: 0000 LDTR: 0000
EIP: 00001122 EFLAGS: 00000282
CR0: 00000000 CR1: 00000000 CR2: 00000000 CR3: 00000000
DR0: 00000000 DR1: 00000000 DR2: 00000000 DR3: 00000000
DR6: 00000000 DR7: 00000000
GDTR: 00000008f466ffff IDTR: 000000000000ffff
CS descriptor: 0000930025A0FFFF
DS descriptor: 000093000700FFFF
ES descriptor: 000093000700FFFF
FS descriptor: 000093000000FFFF
GS descriptor: 000093000000FFFF
SS descriptor: 0000930011E0FFFF
TR descriptor: 000082000000FFFF
LDTR descriptor: 0000000000000000
Show last 443 lines
FLAGSINFO: 00000000000000vr0n00odItSz0a0p1c 
RealRAM(p):000036d1=45(E); RAM(p):000036d1=45(E); Physical(p):000036d1=45(E); Paged(p):000036d1=45(E); Normal(p):00001131=45(E)
025a:00001123 C3 ret RealRAM(r):00001ad4=3e(>); RAM(r):00001adc=3e(>); Physical(r):00001adc=3e(>); Paged(r):00001adc=3e(>); RealRAM(r):00001ad5=0e(); RAM(r):00001add=0e(); Physical(r):00001add=0e(); Paged(r):00001add=0e()
Registers:
EAX: 00000020 EBX: 0000053b ECX: 00000005 EDX: 00000000
ESP: 000008fc EBP: 00000904 ESI: 00000c54 EDI: 0000034e
CS: 025a DS: 0070 ES: 0070 FS: 0000 GS: 0000 SS: 011e TR: 0000 LDTR: 0000
EIP: 00001123 EFLAGS: 00000282
CR0: 00000000 CR1: 00000000 CR2: 00000000 CR3: 00000000
DR0: 00000000 DR1: 00000000 DR2: 00000000 DR3: 00000000
DR6: 00000000 DR7: 00000000
GDTR: 00000008f466ffff IDTR: 000000000000ffff
CS descriptor: 0000930025A0FFFF
DS descriptor: 000093000700FFFF
ES descriptor: 000093000700FFFF
FS descriptor: 000093000000FFFF
GS descriptor: 000093000000FFFF
SS descriptor: 0000930011E0FFFF
TR descriptor: 000082000000FFFF
LDTR descriptor: 0000000000000000
FLAGSINFO: 00000000000000vr0n00odItSz0a0p1c
RealRAM(p):000033d6=59(Y); RAM(p):000033de=59(Y); Physical(p):000033de=59(Y); Paged(p):000033de=59(Y); Normal(p):00000e3e=59(Y); RealRAM(p):000033d7=72(r); RAM(p):000033df=72(r); Physical(p):000033df=72(r); Paged(p):000033df=72(r); Normal(p):00000e3f=72(r); RealRAM(p):000033e0=16(); RAM(p):000033e0=16(); Physical(p):000033e0=16(); Paged(p):000033e0=16(); Normal(p):00000e40=16(); RealRAM(p):000033e1=51(Q); RAM(p):000033e1=51(Q); Physical(p):000033e1=51(Q); Paged(p):000033e1=51(Q); Normal(p):00000e41=51(Q); RealRAM(p):000033e2=53(S); RAM(p):000033e2=53(S); Physical(p):000033e2=53(S); Paged(p):000033e2=53(S); Normal(p):00000e42=53(S); RealRAM(p):000033e3=33(3); RAM(p):000033e3=33(3); Physical(p):000033e3=33(3); Paged(p):000033e3=33(3); Normal(p):00000e43=33(3); RealRAM(p):000033e4=db(?); RAM(p):000033e4=db(?); Physical(p):000033e4=db(?); Paged(p):000033e4=db(?); Normal(p):00000e44=db(?); RealRAM(p):000033e5=89(?); RAM(p):000033e5=89(?); Physical(p):000033e5=89(?); Paged(p):000033e5=89(?); Normal(p):00000e45=89(?); RealRAM(p):000033e6=1e(); RAM(p):000033e6=1e(); Physical(p):000033e6=1e(); Paged(p):000033e6=1e(); Normal(p):00000e46=1e(); RealRAM(p):000033e7=37(7); RAM(p):000033e7=37(7); Physical(p):000033e7=37(7); Paged(p):000033e7=37(7); Normal(p):00000e47=37(7); RealRAM(p):000033e0=05(); RAM(p):000033e8=05(); Physical(p):000033e8=05(); Paged(p):000033e8=05(); Normal(p):00000e48=05(); RealRAM(p):000033e1=a0(?); RAM(p):000033e9=a0(?); Physical(p):000033e9=a0(?); Paged(p):000033e9=a0(?); Normal(p):00000e49=a0(?); RealRAM(p):000033e2=39(9); RAM(p):000033ea=39(9); Physical(p):000033ea=39(9); Paged(p):000033ea=39(9); Normal(p):00000e4a=39(9); RealRAM(p):000033e3=05(); RAM(p):000033eb=05(); Physical(p):000033eb=05(); Paged(p):000033eb=05(); Normal(p):00000e4b=05(); RealRAM(p):000033e4=b4(?); RAM(p):000033ec=b4(?); Physical(p):000033ec=b4(?); Paged(p):000033ec=b4(?); Normal(p):00000e4c=b4(?)
025a:00000e3e 59 pop cx RealRAM(r):00001ad6=05(); RAM(r):00001ade=05(); Physical(r):00001ade=05(); Paged(r):00001ade=05(); RealRAM(r):00001ad7=00( ); RAM(r):00001adf=00( ); Physical(r):00001adf=00( ); Paged(r):00001adf=00( )
Registers:
EAX: 00000020 EBX: 0000053b ECX: 00000005 EDX: 00000000
ESP: 000008fe EBP: 00000904 ESI: 00000c54 EDI: 0000034e
CS: 025a DS: 0070 ES: 0070 FS: 0000 GS: 0000 SS: 011e TR: 0000 LDTR: 0000
EIP: 00000e3e EFLAGS: 00000282
CR0: 00000000 CR1: 00000000 CR2: 00000000 CR3: 00000000
DR0: 00000000 DR1: 00000000 DR2: 00000000 DR3: 00000000
DR6: 00000000 DR7: 00000000
GDTR: 00000008f466ffff IDTR: 000000000000ffff
CS descriptor: 0000930025A0FFFF
DS descriptor: 000093000700FFFF
ES descriptor: 000093000700FFFF
FS descriptor: 000093000000FFFF
GS descriptor: 000093000000FFFF
SS descriptor: 0000930011E0FFFF
TR descriptor: 000082000000FFFF
LDTR descriptor: 0000000000000000
FLAGSINFO: 00000000000000vr0n00odItSz0a0p1c
RealRAM(p):000033e5=04(); RAM(p):000033ed=04(); Physical(p):000033ed=04(); Paged(p):000033ed=04(); Normal(p):00000e4d=04()
025a:00000e3f 72 16 jc 00000e57
Registers:
EAX: 00000020 EBX: 0000053b ECX: 00000005 EDX: 00000000
ESP: 00000900 EBP: 00000904 ESI: 00000c54 EDI: 0000034e
CS: 025a DS: 0070 ES: 0070 FS: 0000 GS: 0000 SS: 011e TR: 0000 LDTR: 0000
EIP: 00000e3f EFLAGS: 00000282
CR0: 00000000 CR1: 00000000 CR2: 00000000 CR3: 00000000
DR0: 00000000 DR1: 00000000 DR2: 00000000 DR3: 00000000
DR6: 00000000 DR7: 00000000
GDTR: 00000008f466ffff IDTR: 000000000000ffff
CS descriptor: 0000930025A0FFFF
DS descriptor: 000093000700FFFF
ES descriptor: 000093000700FFFF
FS descriptor: 000093000000FFFF
GS descriptor: 000093000000FFFF
SS descriptor: 0000930011E0FFFF
TR descriptor: 000082000000FFFF
LDTR descriptor: 0000000000000000
FLAGSINFO: 00000000000000vr0n00odItSz0a0p1c
RealRAM(p):000033e6=b1(?); RAM(p):000033ee=b1(?); Physical(p):000033ee=b1(?); Paged(p):000033ee=b1(?); Normal(p):00000e4e=b1(?); RealRAM(p):000033e7=01(); RAM(p):000033ef=01(); Physical(p):000033ef=01(); Paged(p):000033ef=01(); Normal(p):00000e4f=01()
025a:00000e41 51 push cx Paged(w):00001ade=05(); Physical(w):00001ade=05(); RAM(w):00001ade=05(); RealRAM(w):00001ad6=05(); Paged(w):00001adf=00( ); Physical(w):00001adf=00( ); RAM(w):00001adf=00( ); RealRAM(w):00001ad7=00( )
Registers:
EAX: 00000020 EBX: 0000053b ECX: 00000005 EDX: 00000000
ESP: 00000900 EBP: 00000904 ESI: 00000c54 EDI: 0000034e
CS: 025a DS: 0070 ES: 0070 FS: 0000 GS: 0000 SS: 011e TR: 0000 LDTR: 0000
EIP: 00000e41 EFLAGS: 00000282
CR0: 00000000 CR1: 00000000 CR2: 00000000 CR3: 00000000
DR0: 00000000 DR1: 00000000 DR2: 00000000 DR3: 00000000
DR6: 00000000 DR7: 00000000
GDTR: 00000008f466ffff IDTR: 000000000000ffff
CS descriptor: 0000930025A0FFFF
DS descriptor: 000093000700FFFF
ES descriptor: 000093000700FFFF
FS descriptor: 000093000000FFFF
GS descriptor: 000093000000FFFF
SS descriptor: 0000930011E0FFFF
TR descriptor: 000082000000FFFF
LDTR descriptor: 0000000000000000
FLAGSINFO: 00000000000000vr0n00odItSz0a0p1c
RealRAM(p):000033f0=e8(?); RAM(p):000033f0=e8(?); Physical(p):000033f0=e8(?); Paged(p):000033f0=e8(?); Normal(p):00000e50=e8(?)
025a:00000e42 53 push bx Paged(w):00001adc=3b(;); Physical(w):00001adc=3b(;); RAM(w):00001adc=3b(;); RealRAM(w):00001ad4=3b(;); Paged(w):00001add=05(); Physical(w):00001add=05(); RAM(w):00001add=05(); RealRAM(w):00001ad5=05()
Registers:
EAX: 00000020 EBX: 0000053b ECX: 00000005 EDX: 00000000
ESP: 000008fe EBP: 00000904 ESI: 00000c54 EDI: 0000034e
CS: 025a DS: 0070 ES: 0070 FS: 0000 GS: 0000 SS: 011e TR: 0000 LDTR: 0000
EIP: 00000e42 EFLAGS: 00000282
CR0: 00000000 CR1: 00000000 CR2: 00000000 CR3: 00000000
DR0: 00000000 DR1: 00000000 DR2: 00000000 DR3: 00000000
DR6: 00000000 DR7: 00000000
GDTR: 00000008f466ffff IDTR: 000000000000ffff
CS descriptor: 0000930025A0FFFF
DS descriptor: 000093000700FFFF
ES descriptor: 000093000700FFFF
FS descriptor: 000093000000FFFF
GS descriptor: 000093000000FFFF
SS descriptor: 0000930011E0FFFF
TR descriptor: 000082000000FFFF
LDTR descriptor: 0000000000000000
FLAGSINFO: 00000000000000vr0n00odItSz0a0p1c
RealRAM(p):000033f1=79(y); RAM(p):000033f1=79(y); Physical(p):000033f1=79(y); Paged(p):000033f1=79(y); Normal(p):00000e51=79(y)
025a:00000e43 33 DB xor bx,bx
Registers:
EAX: 00000020 EBX: 0000053b ECX: 00000005 EDX: 00000000
ESP: 000008fc EBP: 00000904 ESI: 00000c54 EDI: 0000034e
CS: 025a DS: 0070 ES: 0070 FS: 0000 GS: 0000 SS: 011e TR: 0000 LDTR: 0000
EIP: 00000e43 EFLAGS: 00000282
CR0: 00000000 CR1: 00000000 CR2: 00000000 CR3: 00000000
DR0: 00000000 DR1: 00000000 DR2: 00000000 DR3: 00000000
DR6: 00000000 DR7: 00000000
GDTR: 00000008f466ffff IDTR: 000000000000ffff
CS descriptor: 0000930025A0FFFF
DS descriptor: 000093000700FFFF
ES descriptor: 000093000700FFFF
FS descriptor: 000093000000FFFF
GS descriptor: 000093000000FFFF
SS descriptor: 0000930011E0FFFF
TR descriptor: 000082000000FFFF
LDTR descriptor: 0000000000000000
FLAGSINFO: 00000000000000vr0n00odItSz0a0p1c
RealRAM(p):000033f2=02(); RAM(p):000033f2=02(); Physical(p):000033f2=02(); Paged(p):000033f2=02(); Normal(p):00000e52=02(); RealRAM(p):000033f3=5b([); RAM(p):000033f3=5b([); Physical(p):000033f3=5b([); Paged(p):000033f3=5b([); Normal(p):00000e53=5b([)
025a:00000e45 89 1E 37 05 mov word ds:[0537],bx Paged(w):00000c37=00( ); Physical(w):00000c37=00( ); RAM(w):00000c37=00( ); RealRAM(w):00000c37=00( ); Paged(w):00000c38=00( ); Physical(w):00000c38=00( ); RAM(w):00000c38=00( ); RealRAM(w):00000c30=00( )
Registers:
EAX: 00000020 EBX: 00000000 ECX: 00000005 EDX: 00000000
ESP: 000008fc EBP: 00000904 ESI: 00000c54 EDI: 0000034e
CS: 025a DS: 0070 ES: 0070 FS: 0000 GS: 0000 SS: 011e TR: 0000 LDTR: 0000
EIP: 00000e45 EFLAGS: 00000246
CR0: 00000000 CR1: 00000000 CR2: 00000000 CR3: 00000000
DR0: 00000000 DR1: 00000000 DR2: 00000000 DR3: 00000000
DR6: 00000000 DR7: 00000000
GDTR: 00000008f466ffff IDTR: 000000000000ffff
CS descriptor: 0000930025A0FFFF
DS descriptor: 000093000700FFFF
ES descriptor: 000093000700FFFF
FS descriptor: 000093000000FFFF
GS descriptor: 000093000000FFFF
SS descriptor: 0000930011E0FFFF
TR descriptor: 000082000000FFFF
LDTR descriptor: 0000000000000000
FLAGSINFO: 00000000000000vr0n00odItsZ0a0P1c
RealRAM(p):000033f4=59(Y); RAM(p):000033f4=59(Y); Physical(p):000033f4=59(Y); Paged(p):000033f4=59(Y); Normal(p):00000e54=59(Y); RealRAM(p):000033f5=73(s); RAM(p):000033f5=73(s); Physical(p):000033f5=73(s); Paged(p):000033f5=73(s); Normal(p):00000e55=73(s); RealRAM(p):000033f6=29()); RAM(p):000033f6=29()); Physical(p):000033f6=29()); Paged(p):000033f6=29()); Normal(p):00000e56=29()); RealRAM(p):000033f7=e8(?); RAM(p):000033f7=e8(?); Physical(p):000033f7=e8(?); Paged(p):000033f7=e8(?); Normal(p):00000e57=e8(?)
025a:00000e49 A0 39 05 mov al,byte ds:[0539] RealRAM(r):00000c31=12(); RAM(r):00000c39=12(); Physical(r):00000c39=12(); Paged(r):00000c39=12()
Registers:
EAX: 00000020 EBX: 00000000 ECX: 00000005 EDX: 00000000
ESP: 000008fc EBP: 00000904 ESI: 00000c54 EDI: 0000034e
CS: 025a DS: 0070 ES: 0070 FS: 0000 GS: 0000 SS: 011e TR: 0000 LDTR: 0000
EIP: 00000e49 EFLAGS: 00000246
CR0: 00000000 CR1: 00000000 CR2: 00000000 CR3: 00000000
DR0: 00000000 DR1: 00000000 DR2: 00000000 DR3: 00000000
DR6: 00000000 DR7: 00000000
GDTR: 00000008f466ffff IDTR: 000000000000ffff
CS descriptor: 0000930025A0FFFF
DS descriptor: 000093000700FFFF
ES descriptor: 000093000700FFFF
FS descriptor: 000093000000FFFF
GS descriptor: 000093000000FFFF
SS descriptor: 0000930011E0FFFF
TR descriptor: 000082000000FFFF
LDTR descriptor: 0000000000000000
FLAGSINFO: 00000000000000vr0n00odItsZ0a0P1c
RealRAM(p):000033f0=5a(Z); RAM(p):000033f8=5a(Z); Physical(p):000033f8=5a(Z); Paged(p):000033f8=5a(Z); Normal(p):00000e58=5a(Z); RealRAM(p):000033f1=02(); RAM(p):000033f9=02(); Physical(p):000033f9=02(); Paged(p):000033f9=02(); Normal(p):00000e59=02(); RealRAM(p):000033f2=c6(?); RAM(p):000033fa=c6(?); Physical(p):000033fa=c6(?); Paged(p):000033fa=c6(?); Normal(p):00000e5a=c6(?)
025a:00000e4c B4 04 mov ah,04
Registers:
EAX: 00000012 EBX: 00000000 ECX: 00000005 EDX: 00000000
ESP: 000008fc EBP: 00000904 ESI: 00000c54 EDI: 0000034e
CS: 025a DS: 0070 ES: 0070 FS: 0000 GS: 0000 SS: 011e TR: 0000 LDTR: 0000
EIP: 00000e4c EFLAGS: 00000246
CR0: 00000000 CR1: 00000000 CR2: 00000000 CR3: 00000000
DR0: 00000000 DR1: 00000000 DR2: 00000000 DR3: 00000000
DR6: 00000000 DR7: 00000000
GDTR: 00000008f466ffff IDTR: 000000000000ffff
CS descriptor: 0000930025A0FFFF
DS descriptor: 000093000700FFFF
ES descriptor: 000093000700FFFF
FS descriptor: 000093000000FFFF
GS descriptor: 000093000000FFFF
SS descriptor: 0000930011E0FFFF
TR descriptor: 000082000000FFFF
LDTR descriptor: 0000000000000000
FLAGSINFO: 00000000000000vr0n00odItsZ0a0P1c
RealRAM(p):000033f3=06(); RAM(p):000033fb=06(); Physical(p):000033fb=06(); Paged(p):000033fb=06(); Normal(p):00000e5b=06(); RealRAM(p):000033f4=39(9); RAM(p):000033fc=39(9); Physical(p):000033fc=39(9); Paged(p):000033fc=39(9); Normal(p):00000e5c=39(9)
025a:00000e4e B1 01 mov cl,01
Registers:
EAX: 00000412 EBX: 00000000 ECX: 00000005 EDX: 00000000
ESP: 000008fc EBP: 00000904 ESI: 00000c54 EDI: 0000034e
CS: 025a DS: 0070 ES: 0070 FS: 0000 GS: 0000 SS: 011e TR: 0000 LDTR: 0000
EIP: 00000e4e EFLAGS: 00000246
CR0: 00000000 CR1: 00000000 CR2: 00000000 CR3: 00000000
DR0: 00000000 DR1: 00000000 DR2: 00000000 DR3: 00000000
DR6: 00000000 DR7: 00000000
GDTR: 00000008f466ffff IDTR: 000000000000ffff
CS descriptor: 0000930025A0FFFF
DS descriptor: 000093000700FFFF
ES descriptor: 000093000700FFFF
FS descriptor: 000093000000FFFF
GS descriptor: 000093000000FFFF
SS descriptor: 0000930011E0FFFF
TR descriptor: 000082000000FFFF
LDTR descriptor: 0000000000000000
FLAGSINFO: 00000000000000vr0n00odItsZ0a0P1c
RealRAM(p):000033f5=06(); RAM(p):000033fd=06(); Physical(p):000033fd=06(); Paged(p):000033fd=06(); Normal(p):00000e5d=06(); RealRAM(p):000033f6=01(); RAM(p):000033fe=01(); Physical(p):000033fe=01(); Paged(p):000033fe=01(); Normal(p):00000e5e=01()
025a:00000e50 E8 79 02 call 000010cc Paged(w):00001ada=53(S); Physical(w):00001ada=53(S); RAM(w):00001ada=53(S); RealRAM(w):00001ad2=53(S); Paged(w):00001adb=0e(); Physical(w):00001adb=0e(); RAM(w):00001adb=0e(); RealRAM(w):00001ad3=0e()
Registers:
EAX: 00000412 EBX: 00000000 ECX: 00000001 EDX: 00000000
ESP: 000008fc EBP: 00000904 ESI: 00000c54 EDI: 0000034e
CS: 025a DS: 0070 ES: 0070 FS: 0000 GS: 0000 SS: 011e TR: 0000 LDTR: 0000
EIP: 00000e50 EFLAGS: 00000246
CR0: 00000000 CR1: 00000000 CR2: 00000000 CR3: 00000000
DR0: 00000000 DR1: 00000000 DR2: 00000000 DR3: 00000000
DR6: 00000000 DR7: 00000000
GDTR: 00000008f466ffff IDTR: 000000000000ffff
CS descriptor: 0000930025A0FFFF
DS descriptor: 000093000700FFFF
ES descriptor: 000093000700FFFF
FS descriptor: 000093000000FFFF
GS descriptor: 000093000000FFFF
SS descriptor: 0000930011E0FFFF
TR descriptor: 000082000000FFFF
LDTR descriptor: 0000000000000000
FLAGSINFO: 00000000000000vr0n00odItsZ0a0P1c
RealRAM(p):00003664=53(S); RAM(p):0000366c=53(S); Physical(p):0000366c=53(S); Paged(p):0000366c=53(S); Normal(p):000010cc=53(S); RealRAM(p):00003665=56(V); RAM(p):0000366d=56(V); Physical(p):0000366d=56(V); Paged(p):0000366d=56(V); Normal(p):000010cd=56(V); RealRAM(p):00003666=f6(?); RAM(p):0000366e=f6(?); Physical(p):0000366e=f6(?); Paged(p):0000366e=f6(?); Normal(p):000010ce=f6(?); RealRAM(p):00003667=06(); RAM(p):0000366f=06(); Physical(p):0000366f=06(); Paged(p):0000366f=06(); Normal(p):000010cf=06(); RealRAM(p):00003670=38(8); RAM(p):00003670=38(8); Physical(p):00003670=38(8); Paged(p):00003670=38(8); Normal(p):000010d0=38(8); RealRAM(p):00003671=06(); RAM(p):00003671=06(); Physical(p):00003671=06(); Paged(p):00003671=06(); Normal(p):000010d1=06(); RealRAM(p):00003672=01(); RAM(p):00003672=01(); Physical(p):00003672=01(); Paged(p):00003672=01(); Normal(p):000010d2=01(); RealRAM(p):00003673=75(u); RAM(p):00003673=75(u); Physical(p):00003673=75(u); Paged(p):00003673=75(u); Normal(p):000010d3=75(u); RealRAM(p):00003674=36(6); RAM(p):00003674=36(6); Physical(p):00003674=36(6); Paged(p):00003674=36(6); Normal(p):000010d4=36(6); RealRAM(p):00003675=50(P); RAM(p):00003675=50(P); Physical(p):00003675=50(P); Paged(p):00003675=50(P); Normal(p):000010d5=50(P); RealRAM(p):00003676=06(); RAM(p):00003676=06(); Physical(p):00003676=06(); Paged(p):00003676=06(); Normal(p):000010d6=06(); RealRAM(p):00003677=26(&); RAM(p):00003677=26(&); Physical(p):00003677=26(&); Paged(p):00003677=26(&); Normal(p):000010d7=26(&); RealRAM(p):00003670=80(?); RAM(p):00003678=80(?); Physical(p):00003678=80(?); Paged(p):00003678=80(?); Normal(p):000010d8=80(?); RealRAM(p):00003671=7d(}); RAM(p):00003679=7d(}); Physical(p):00003679=7d(}); Paged(p):00003679=7d(}); Normal(p):000010d9=7d(}); RealRAM(p):00003672=22("); RAM(p):0000367a=22("); Physical(p):0000367a=22("); Paged(p):0000367a=22("); Normal(p):000010da=22(")
025a:000010cc 53 push bx Paged(w):00001ad8=00( ); Physical(w):00001ad8=00( ); RAM(w):00001ad8=00( ); RealRAM(w):00001ad0=00( ); Paged(w):00001ad9=00( ); Physical(w):00001ad9=00( ); RAM(w):00001ad9=00( ); RealRAM(w):00001ad1=00( )
Registers:
EAX: 00000412 EBX: 00000000 ECX: 00000001 EDX: 00000000
ESP: 000008fa EBP: 00000904 ESI: 00000c54 EDI: 0000034e
CS: 025a DS: 0070 ES: 0070 FS: 0000 GS: 0000 SS: 011e TR: 0000 LDTR: 0000
EIP: 000010cc EFLAGS: 00000246
CR0: 00000000 CR1: 00000000 CR2: 00000000 CR3: 00000000
DR0: 00000000 DR1: 00000000 DR2: 00000000 DR3: 00000000
DR6: 00000000 DR7: 00000000
GDTR: 00000008f466ffff IDTR: 000000000000ffff
CS descriptor: 0000930025A0FFFF
DS descriptor: 000093000700FFFF
ES descriptor: 000093000700FFFF
FS descriptor: 000093000000FFFF
GS descriptor: 000093000000FFFF
SS descriptor: 0000930011E0FFFF
TR descriptor: 000082000000FFFF
LDTR descriptor: 0000000000000000
FLAGSINFO: 00000000000000vr0n00odItsZ0a0P1c
RealRAM(p):00003673=02(); RAM(p):0000367b=02(); Physical(p):0000367b=02(); Paged(p):0000367b=02(); Normal(p):000010db=02()
025a:000010cd 56 push si Paged(w):00001ad6=54(T); Physical(w):00001ad6=54(T); RAM(w):00001ad6=54(T); RealRAM(w):00001ad6=54(T); Paged(w):00001ad7=0c(); Physical(w):00001ad7=0c(); RAM(w):00001ad7=0c(); RealRAM(w):00001ad7=0c()
Registers:
EAX: 00000412 EBX: 00000000 ECX: 00000001 EDX: 00000000
ESP: 000008f8 EBP: 00000904 ESI: 00000c54 EDI: 0000034e
CS: 025a DS: 0070 ES: 0070 FS: 0000 GS: 0000 SS: 011e TR: 0000 LDTR: 0000
EIP: 000010cd EFLAGS: 00000246
CR0: 00000000 CR1: 00000000 CR2: 00000000 CR3: 00000000
DR0: 00000000 DR1: 00000000 DR2: 00000000 DR3: 00000000
DR6: 00000000 DR7: 00000000
GDTR: 00000008f466ffff IDTR: 000000000000ffff
CS descriptor: 0000930025A0FFFF
DS descriptor: 000093000700FFFF
ES descriptor: 000093000700FFFF
FS descriptor: 000093000000FFFF
GS descriptor: 000093000000FFFF
SS descriptor: 0000930011E0FFFF
TR descriptor: 000082000000FFFF
LDTR descriptor: 0000000000000000
FLAGSINFO: 00000000000000vr0n00odItsZ0a0P1c
RealRAM(p):00003674=9c(?); RAM(p):0000367c=9c(?); Physical(p):0000367c=9c(?); Paged(p):0000367c=9c(?); Normal(p):000010dc=9c(?)
025a:000010ce F6 06 38 06 01 test byte ds:[0638],01 RealRAM(r):00000d30=01(); RAM(r):00000d38=01(); Physical(r):00000d38=01(); Paged(r):00000d38=01()
Registers:
EAX: 00000412 EBX: 00000000 ECX: 00000001 EDX: 00000000
ESP: 000008f6 EBP: 00000904 ESI: 00000c54 EDI: 0000034e
CS: 025a DS: 0070 ES: 0070 FS: 0000 GS: 0000 SS: 011e TR: 0000 LDTR: 0000
EIP: 000010ce EFLAGS: 00000246
CR0: 00000000 CR1: 00000000 CR2: 00000000 CR3: 00000000
DR0: 00000000 DR1: 00000000 DR2: 00000000 DR3: 00000000
DR6: 00000000 DR7: 00000000
GDTR: 00000008f466ffff IDTR: 000000000000ffff
CS descriptor: 0000930025A0FFFF
DS descriptor: 000093000700FFFF
ES descriptor: 000093000700FFFF
FS descriptor: 000093000000FFFF
GS descriptor: 000093000000FFFF
SS descriptor: 0000930011E0FFFF
TR descriptor: 000082000000FFFF
LDTR descriptor: 0000000000000000
FLAGSINFO: 00000000000000vr0n00odItsZ0a0P1c
RealRAM(p):00003675=8e(?); RAM(p):0000367d=8e(?); Physical(p):0000367d=8e(?); Paged(p):0000367d=8e(?); Normal(p):000010dd=8e(?); RealRAM(p):00003676=06(); RAM(p):0000367e=06(); Physical(p):0000367e=06(); Paged(p):0000367e=06(); Normal(p):000010de=06(); RealRAM(p):00003677=1a(); RAM(p):0000367f=1a(); Physical(p):0000367f=1a(); Paged(p):0000367f=1a(); Normal(p):000010df=1a(); RealRAM(p):00003680=00( ); RAM(p):00003680=00( ); Physical(p):00003680=00( ); Paged(p):00003680=00( ); Normal(p):000010e0=00( ); RealRAM(p):00003681=26(&); RAM(p):00003681=26(&); Physical(p):00003681=26(&); Paged(p):00003681=26(&); Normal(p):000010e1=26(&)
025a:000010d3 75 36 jnz 0000110b
Registers:
EAX: 00000412 EBX: 00000000 ECX: 00000001 EDX: 00000000
ESP: 000008f6 EBP: 00000904 ESI: 00000c54 EDI: 0000034e
CS: 025a DS: 0070 ES: 0070 FS: 0000 GS: 0000 SS: 011e TR: 0000 LDTR: 0000
EIP: 000010d3 EFLAGS: 00000202
CR0: 00000000 CR1: 00000000 CR2: 00000000 CR3: 00000000
DR0: 00000000 DR1: 00000000 DR2: 00000000 DR3: 00000000
DR6: 00000000 DR7: 00000000
GDTR: 00000008f466ffff IDTR: 000000000000ffff
CS descriptor: 0000930025A0FFFF
DS descriptor: 000093000700FFFF
ES descriptor: 000093000700FFFF
FS descriptor: 000093000000FFFF
GS descriptor: 000093000000FFFF
SS descriptor: 0000930011E0FFFF
TR descriptor: 000082000000FFFF
LDTR descriptor: 0000000000000000
FLAGSINFO: 00000000000000vr0n00odItsz0a0p1c
RealRAM(p):000036a3=8b(?); RAM(p):000036ab=8b(?); Physical(p):000036ab=8b(?); Paged(p):000036ab=8b(?); Normal(p):0000110b=8b(?); RealRAM(p):000036a4=16(); RAM(p):000036ac=16(); Physical(p):000036ac=16(); Paged(p):000036ac=16(); Normal(p):0000110c=16(); RealRAM(p):000036a5=39(9); RAM(p):000036ad=39(9); Physical(p):000036ad=39(9); Paged(p):000036ad=39(9); Normal(p):0000110d=39(9); RealRAM(p):000036a6=01(); RAM(p):000036ae=01(); Physical(p):000036ae=01(); Paged(p):000036ae=01(); Normal(p):0000110e=01(); RealRAM(p):000036a7=8a(?); RAM(p):000036af=8a(?); Physical(p):000036af=8a(?); Paged(p):000036af=8a(?); Normal(p):0000110f=8a(?); RealRAM(p):000036b0=ea(?); RAM(p):000036b0=ea(?); Physical(p):000036b0=ea(?); Paged(p):000036b0=ea(?); Normal(p):00001110=ea(?); RealRAM(p):000036b1=26(&); RAM(p):000036b1=26(&); Physical(p):000036b1=26(&); Paged(p):000036b1=26(&); Normal(p):00001111=26(&); RealRAM(p):000036b2=8a(?); RAM(p):000036b2=8a(?); Physical(p):000036b2=8a(?); Paged(p):000036b2=8a(?); Normal(p):00001112=8a(?); RealRAM(p):000036b3=55(U); RAM(p):000036b3=55(U); Physical(p):000036b3=55(U); Paged(p):000036b3=55(U); Normal(p):00001113=55(U); RealRAM(p):000036b4=04(); RAM(p):000036b4=04(); Physical(p):000036b4=04(); Paged(p):000036b4=04(); Normal(p):00001114=04(); RealRAM(p):000036b5=8a(?); RAM(p):000036b5=8a(?); Physical(p):000036b5=8a(?); Paged(p):000036b5=8a(?); Normal(p):00001115=8a(?); RealRAM(p):000036b6=36(6); RAM(p):000036b6=36(6); Physical(p):000036b6=36(6); Paged(p):000036b6=36(6); Normal(p):00001116=36(6); RealRAM(p):000036b7=38(8); RAM(p):000036b7=38(8); Physical(p):000036b7=38(8); Paged(p):000036b7=38(8); Normal(p):00001117=38(8); RealRAM(p):000036b0=01(); RAM(p):000036b8=01(); Physical(p):000036b8=01(); Paged(p):000036b8=01(); Normal(p):00001118=01(); RealRAM(p):000036b1=06(); RAM(p):000036b9=06(); Physical(p):000036b9=06(); Paged(p):000036b9=06(); Normal(p):00001119=06()
025a:0000110b 8B 16 39 01 mov dx,word ds:[0139] RealRAM(r):00000831=00( ); RAM(r):00000839=00( ); Physical(r):00000839=00( ); Paged(r):00000839=00( ); RealRAM(r):00000832=00( ); RAM(r):0000083a=00( ); Physical(r):0000083a=00( ); Paged(r):0000083a=00( )
Registers:
EAX: 00000412 EBX: 00000000 ECX: 00000001 EDX: 00000000
ESP: 000008f6 EBP: 00000904 ESI: 00000c54 EDI: 0000034e
CS: 025a DS: 0070 ES: 0070 FS: 0000 GS: 0000 SS: 011e TR: 0000 LDTR: 0000
EIP: 0000110b EFLAGS: 00000202
CR0: 00000000 CR1: 00000000 CR2: 00000000 CR3: 00000000
DR0: 00000000 DR1: 00000000 DR2: 00000000 DR3: 00000000
DR6: 00000000 DR7: 00000000
GDTR: 00000008f466ffff IDTR: 000000000000ffff
CS descriptor: 0000930025A0FFFF
DS descriptor: 000093000700FFFF
ES descriptor: 000093000700FFFF
FS descriptor: 000093000000FFFF
GS descriptor: 000093000000FFFF
SS descriptor: 0000930011E0FFFF
TR descriptor: 000082000000FFFF
LDTR descriptor: 0000000000000000
FLAGSINFO: 00000000000000vr0n00odItsz0a0p1c
RealRAM(p):000036b2=8e(?); RAM(p):000036ba=8e(?); Physical(p):000036ba=8e(?); Paged(p):000036ba=8e(?); Normal(p):0000111a=8e(?); RealRAM(p):000036b3=06(); RAM(p):000036bb=06(); Physical(p):000036bb=06(); Paged(p):000036bb=06(); Normal(p):0000111b=06(); RealRAM(p):000036b4=37(7); RAM(p):000036bc=37(7); Physical(p):000036bc=37(7); Paged(p):000036bc=37(7); Normal(p):0000111c=37(7); RealRAM(p):000036b5=05(); RAM(p):000036bd=05(); Physical(p):000036bd=05(); Paged(p):000036bd=05(); Normal(p):0000111d=05()
025a:0000110f 8A EA mov ch,dl
Registers:
EAX: 00000412 EBX: 00000000 ECX: 00000001 EDX: 00000000
ESP: 000008f6 EBP: 00000904 ESI: 00000c54 EDI: 0000034e
CS: 025a DS: 0070 ES: 0070 FS: 0000 GS: 0000 SS: 011e TR: 0000 LDTR: 0000
EIP: 0000110f EFLAGS: 00000202
CR0: 00000000 CR1: 00000000 CR2: 00000000 CR3: 00000000
DR0: 00000000 DR1: 00000000 DR2: 00000000 DR3: 00000000
DR6: 00000000 DR7: 00000000
GDTR: 00000008f466ffff IDTR: 000000000000ffff
CS descriptor: 0000930025A0FFFF
DS descriptor: 000093000700FFFF
ES descriptor: 000093000700FFFF
FS descriptor: 000093000000FFFF
GS descriptor: 000093000000FFFF
SS descriptor: 0000930011E0FFFF
TR descriptor: 000082000000FFFF
LDTR descriptor: 0000000000000000
FLAGSINFO: 00000000000000vr0n00odItsz0a0p1c
RealRAM(p):000036b6=cd(?); RAM(p):000036be=cd(?); Physical(p):000036be=cd(?); Paged(p):000036be=cd(?); Normal(p):0000111e=cd(?); RealRAM(p):000036b7=13(); RAM(p):000036bf=13(); Physical(p):000036bf=13(); Paged(p):000036bf=13(); Normal(p):0000111f=13()
025a:00001111 26 8A 55 04 mov dl,byte es:[di+04] RealRAM(r):00000a52=00( ); RAM(r):00000a52=00( ); Physical(r):00000a52=00( ); Paged(r):00000a52=00( )
Registers:
EAX: 00000412 EBX: 00000000 ECX: 00000001 EDX: 00000000
ESP: 000008f6 EBP: 00000904 ESI: 00000c54 EDI: 0000034e
CS: 025a DS: 0070 ES: 0070 FS: 0000 GS: 0000 SS: 011e TR: 0000 LDTR: 0000
EIP: 00001111 EFLAGS: 00000202
CR0: 00000000 CR1: 00000000 CR2: 00000000 CR3: 00000000
DR0: 00000000 DR1: 00000000 DR2: 00000000 DR3: 00000000
DR6: 00000000 DR7: 00000000
GDTR: 00000008f466ffff IDTR: 000000000000ffff
CS descriptor: 0000930025A0FFFF
DS descriptor: 000093000700FFFF
ES descriptor: 000093000700FFFF
FS descriptor: 000093000000FFFF
GS descriptor: 000093000000FFFF
SS descriptor: 0000930011E0FFFF
TR descriptor: 000082000000FFFF
LDTR descriptor: 0000000000000000
FLAGSINFO: 00000000000000vr0n00odItsz0a0p1c
RealRAM(p):000036c0=07(); RAM(p):000036c0=07(); Physical(p):000036c0=07(); Paged(p):000036c0=07(); Normal(p):00001120=07(); RealRAM(p):000036c1=5e(^); RAM(p):000036c1=5e(^); Physical(p):000036c1=5e(^); Paged(p):000036c1=5e(^); Normal(p):00001121=5e(^); RealRAM(p):000036c2=5b([); RAM(p):000036c2=5b([); Physical(p):000036c2=5b([); Paged(p):000036c2=5b([); Normal(p):00001122=5b([); RealRAM(p):000036c3=c3(?); RAM(p):000036c3=c3(?); Physical(p):000036c3=c3(?); Paged(p):000036c3=c3(?); Normal(p):00001123=c3(?)
025a:00001115 8A 36 38 01 mov dh,byte ds:[0138] RealRAM(r):00000830=00( ); RAM(r):00000838=00( ); Physical(r):00000838=00( ); Paged(r):00000838=00( )
Registers:
EAX: 00000412 EBX: 00000000 ECX: 00000001 EDX: 00000000
ESP: 000008f6 EBP: 00000904 ESI: 00000c54 EDI: 0000034e
CS: 025a DS: 0070 ES: 0070 FS: 0000 GS: 0000 SS: 011e TR: 0000 LDTR: 0000
EIP: 00001115 EFLAGS: 00000202
CR0: 00000000 CR1: 00000000 CR2: 00000000 CR3: 00000000
DR0: 00000000 DR1: 00000000 DR2: 00000000 DR3: 00000000
DR6: 00000000 DR7: 00000000
GDTR: 00000008f466ffff IDTR: 000000000000ffff
CS descriptor: 0000930025A0FFFF
DS descriptor: 000093000700FFFF
ES descriptor: 000093000700FFFF
FS descriptor: 000093000000FFFF
GS descriptor: 000093000000FFFF
SS descriptor: 0000930011E0FFFF
TR descriptor: 000082000000FFFF
LDTR descriptor: 0000000000000000
FLAGSINFO: 00000000000000vr0n00odItsz0a0p1c
RealRAM(p):000036c4=e8(?); RAM(p):000036c4=e8(?); Physical(p):000036c4=e8(?); Paged(p):000036c4=e8(?); Normal(p):00001124=e8(?); RealRAM(p):000036c5=b0(?); RAM(p):000036c5=b0(?); Physical(p):000036c5=b0(?); Paged(p):000036c5=b0(?); Normal(p):00001125=b0(?); RealRAM(p):000036c6=f3(?); RAM(p):000036c6=f3(?); Physical(p):000036c6=f3(?); Paged(p):000036c6=f3(?); Normal(p):00001126=f3(?); RealRAM(p):000036c7=26(&); RAM(p):000036c7=26(&); Physical(p):000036c7=26(&); Paged(p):000036c7=26(&); Normal(p):00001127=26(&)
025a:00001119 06 push es Paged(w):00001ad4=70(p); Physical(w):00001ad4=70(p); RAM(w):00001ad4=70(p); RealRAM(w):00001ad4=70(p); Paged(w):00001ad5=00( ); Physical(w):00001ad5=00( ); RAM(w):00001ad5=00( ); RealRAM(w):00001ad5=00( )
Registers:
EAX: 00000412 EBX: 00000000 ECX: 00000001 EDX: 00000000
ESP: 000008f6 EBP: 00000904 ESI: 00000c54 EDI: 0000034e
CS: 025a DS: 0070 ES: 0070 FS: 0000 GS: 0000 SS: 011e TR: 0000 LDTR: 0000
EIP: 00001119 EFLAGS: 00000202
CR0: 00000000 CR1: 00000000 CR2: 00000000 CR3: 00000000
DR0: 00000000 DR1: 00000000 DR2: 00000000 DR3: 00000000
DR6: 00000000 DR7: 00000000
GDTR: 00000008f466ffff IDTR: 000000000000ffff
CS descriptor: 0000930025A0FFFF
DS descriptor: 000093000700FFFF
ES descriptor: 000093000700FFFF
FS descriptor: 000093000000FFFF
GS descriptor: 000093000000FFFF
SS descriptor: 0000930011E0FFFF
TR descriptor: 000082000000FFFF
LDTR descriptor: 0000000000000000
FLAGSINFO: 00000000000000vr0n00odItsz0a0p1c
RealRAM(p):000036c0=8a(?); RAM(p):000036c8=8a(?); Physical(p):000036c8=8a(?); Paged(p):000036c8=8a(?); Normal(p):00001128=8a(?)
025a:0000111a 8E 06 37 05 mov es,word ds:[0537] RealRAM(r):00000c37=00( ); RAM(r):00000c37=00( ); Physical(r):00000c37=00( ); Paged(r):00000c37=00( ); RealRAM(r):00000c30=00( ); RAM(r):00000c38=00( ); Physical(r):00000c38=00( ); Paged(r):00000c38=00( )
Registers:
EAX: 00000412 EBX: 00000000 ECX: 00000001 EDX: 00000000
ESP: 000008f4 EBP: 00000904 ESI: 00000c54 EDI: 0000034e
CS: 025a DS: 0070 ES: 0070 FS: 0000 GS: 0000 SS: 011e TR: 0000 LDTR: 0000
EIP: 0000111a EFLAGS: 00000202
CR0: 00000000 CR1: 00000000 CR2: 00000000 CR3: 00000000
DR0: 00000000 DR1: 00000000 DR2: 00000000 DR3: 00000000
DR6: 00000000 DR7: 00000000
GDTR: 00000008f466ffff IDTR: 000000000000ffff
CS descriptor: 0000930025A0FFFF
DS descriptor: 000093000700FFFF
ES descriptor: 000093000700FFFF
FS descriptor: 000093000000FFFF
GS descriptor: 000093000000FFFF
SS descriptor: 0000930011E0FFFF
TR descriptor: 000082000000FFFF
LDTR descriptor: 0000000000000000
FLAGSINFO: 00000000000000vr0n00odItsz0a0p1c
RealRAM(p):000036c1=45(E); RAM(p):000036c9=45(E); Physical(p):000036c9=45(E); Paged(p):000036c9=45(E); Normal(p):00001129=45(E); RealRAM(p):000036c2=04(); RAM(p):000036ca=04(); Physical(p):000036ca=04(); Paged(p):000036ca=04(); Normal(p):0000112a=04(); RealRAM(p):000036c3=c4(?); RAM(p):000036cb=c4(?); Physical(p):000036cb=c4(?); Paged(p):000036cb=c4(?); Normal(p):0000112b=c4(?); RealRAM(p):000036c4=3e(>); RAM(p):000036cc=3e(>); Physical(p):000036cc=3e(>); Paged(p):000036cc=3e(>); Normal(p):0000112c=3e(>)
02:55:29:31.04816: Interrupt 13=0070:00000774@025A:1120(CD); ERRORCODE: FFFFFFFE
025a:0000111e CD 13 int 13 Paged(w):00001ad2=02(); Physical(w):00001ad2=02(); RAM(w):00001ad2=02(); RealRAM(w):00001ad2=02(); Paged(w):00001ad3=02(); Physical(w):00001ad3=02(); RAM(w):00001ad3=02(); RealRAM(w):00001ad3=02(); Paged(w):00001ad0=5a(Z); Physical(w):00001ad0=5a(Z); RAM(w):00001ad0=5a(Z); RealRAM(w):00001ad0=5a(Z); Paged(w):00001ad1=02(); Physical(w):00001ad1=02(); RAM(w):00001ad1=02(); RealRAM(w):00001ad1=02(); Paged(w):00001ace=20( ); Physical(w):00001ace=20( ); RAM(w):00001ace=20( ); RealRAM(w):00001ac6=20( ); Paged(w):00001acf=11(); Physical(w):00001acf=11(); RAM(w):00001acf=11(); RealRAM(w):00001ac7=11(); RealRAM(r):00000044=74(t); RAM(r):0000004c=74(t); Physical(r):0000004c=74(t); Paged(r):0000004c=74(t); RealRAM(r):00000045=07(); RAM(r):0000004d=07(); Physical(r):0000004d=07(); Paged(r):0000004d=07(); RealRAM(r):00000046=70(p); RAM(r):0000004e=70(p); Physical(r):0000004e=70(p); Paged(r):0000004e=70(p); RealRAM(r):00000047=00( ); RAM(r):0000004f=00( ); Physical(r):0000004f=00( ); Paged(r):0000004f=00( )
Registers:
EAX: 00000412 EBX: 00000000 ECX: 00000001 EDX: 00000000
ESP: 000008f4 EBP: 00000904 ESI: 00000c54 EDI: 0000034e
CS: 025a DS: 0070 ES: 0000 FS: 0000 GS: 0000 SS: 011e TR: 0000 LDTR: 0000
EIP: 0000111e EFLAGS: 00000202
CR0: 00000000 CR1: 00000000 CR2: 00000000 CR3: 00000000
DR0: 00000000 DR1: 00000000 DR2: 00000000 DR3: 00000000
DR6: 00000000 DR7: 00000000
GDTR: 00000008f466ffff IDTR: 000000000000ffff
CS descriptor: 0000930025A0FFFF
DS descriptor: 000093000700FFFF
ES descriptor: 000093000000FFFF
FS descriptor: 000093000000FFFF
GS descriptor: 000093000000FFFF
SS descriptor: 0000930011E0FFFF
TR descriptor: 000082000000FFFF
LDTR descriptor: 0000000000000000
FLAGSINFO: 00000000000000vr0n00odItsz0a0p1c

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Reply 43 of 55, by superfury

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I'm almost starting to think that the MS-DOS installation itself is somehow corrupted?

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Reply 44 of 55, by superfury

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The issue with the verify command from the BIOS seems to have been that the DMA controller was put in Verify mode, so it was writing the data read from the peripheral(the FDC) to memory. But since it's in verify mode, no data is actually written in memory, just read from the FDC and discarded.

Now, with the DMA controller fixed to behave properly(read from the FDC and discard during INT 13h verify sector(s)), the MS-DOS 6.22 setup properly continues! 😁

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Reply 45 of 55, by superfury

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Now that the FDC and DMA is fixed, I have finally managed to install MS-DOS 6.22 in the normal way(through the entire setup wizard). 😁

I haven't tested stuff like format.com and Windows 95's floppy formatting and reading functionality with the fixed DMA functionality yet, though.

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Reply 46 of 55, by superfury

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Now the big question: what happens with read commands on a unformatted track?

I'd assume ST1=5 and ST2=1(to indicate it couldn't find anything on the disk).

What about the ST0 register? IC probably 1 for abnormal termination(0x40). What about Unit Check and Not Ready? Is just unit check set(drive faulted), Not ready(it's not ready to be read) or both?

Not ready is probably not the case(it's just not formatted), so just Unit Check is set in this case?

Edit: After some more tinkering(proper unformatted sector skipping, ST2 bit 3 being set when nothing is found, ST1 bit 1, 3 and 7 being set and ST0 bits 3 and 4 being set), I've managed to get it past the invalid sector read and on to formatting.

Then I noticed that the new formatting method I implemented was misbehaving, since the SPT of an unformatted track was effectively 1(1 unformatted sector is the minimum for the IMD disk image). So I added a check for the format command to the sector increase function to ignore the SPT setting of the drive to check for overflow(when it reached physical EOT, which is not available for Format Track commands(only for read/write commands)).

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Reply 47 of 55, by superfury

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OK. Having fixed those issues, format.com now tries to physically format the disk.

It's using the sector timings for the 4-byte packet format timings(except 4-byte 'sectors' instead of the usual 512 byte rate, so 128 times faster).

It managed to get up to 8 sectors buffered, at which point format.com suddenly aborts and tries again.

So there's clearly some conflicting timing or timer at work?

Edit: OK. The issue was with the sector rate being used for the format command. When it's determining the sector rate using the RPM and SPT, for normal commands this is fine(e.g. 300 RPM with 18 SPT). But when using the format command on the unformatted track(as is only the case with unformatted IMD disk images), the SPT setting is 1(since there is only one unformatted 'sector' on the disk image). So it'll try to format the disk using a 300 RPM 1 SPT speed, for a total of 18 sectors. Since it handles 300 sectors per minute at that speed, it'll take the time of 18 full tracks being formatted to actually format the track!

I've now adjusted the speed it formats at to perform the format at a proper RPM speed(with the format's track length field taking the place of the SPT(which is 1) in the drive's known geometry.
So in that case, the format will properly finish in 1 track's spinning time(from index hole to index hole), instead of 18 times(with 18 sectors), 9 times(with 9 sectors) etc. as much time.

Which explains why it'll abort after 8 sectors time. It's a total of 8 spins at 300 RPM, so that's 8 rotations per second, so exactly 1 second until it aborts the formatting.
Edit: Then adjusted the timing to be more correct. Then I found out that it was using 1 RPM timing still(due to the check for the format command Track Length to be at most 1(thus not faster than 1 track(SPT) at 300 RPM), while it's supposed to be the opposite(at least 1, while the format command Track Length makes it faster than that(up to a factor of x255(when formatting with a track length of 0xFF)))).

One other thing I've also changed is the way the unmounted disks are handled. They now error out in a normal way, setting ST1 to 0x5, ST2 to 0x1, ST0 not ready and unit check to 1 and the ST0 condition to error out(highest 2 bits = 01h), indicating that the drive isn't ready.

ST1 will also set bit 7 now when it can't find the sector ID after two rotations of the disk(which will make the format.com and reading of the disk work properly).

Edit: Just confirmed that format.com is now properly formatting the IMD disk image in ascending order(track 0 head 0, track 0 head 1, track 1 head 0, track 1 head 1 etc.).

Edit: Just confirmed it. Format.com now properly formats the disk and it's properly readable and writable by MS-DOS 6.22 without visible issues. 😁

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Reply 48 of 55, by superfury

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OK. The FDC in Windows NT 3.1 can format and use the IMD disk image without visible issues as well.
And, interestingly enough, CheckIt from it's MS-DOS prompt crashes within it(executing a 0xFFFF instruction).
And XTIDECFG(The configuration tool for the XT-IDE BIOS) crashes Windows NT 3.1 with a 0x7F Unexpected Kernel Fault BSOD), which is kind of strange, but it tries at least(no FDC errors there).

Still need to test Windows 95 RTM though. I sure hope it'll work once I tested it's FDC crash... Probably fixed, because the issue with the DMA controller is now fixed(which should no longer crash Windows)...

Edit: OK. After fixing the not ready behaviour of the FDC(hang the controller when no disk is present instead of returning an error code for read/write/format/read sector ID), Windows NT should detect them correctly now again(the disk not being inserted).

Having experimented a bit with Windows 95 RTM setup, I found out that somehow Windows 95 doesn't seem to like unformatted floppy disks to be inserted when creating the boot disk. After having used a formatted disk(formatted using Windows NT 3.1), it proceeds to format the disk normally and copy the files to the startup disk. 😁

Also, for MS-DOS, the unformatted floppy needs to be formatted with the /U option for unconditional format, because otherwise it'll try to check for previous data on the disk, which of course fails(since there's no sectors on the disk yet). Unconditional format seems to bypass that, formatting the disk normally.

Windows 95 setup now manages to create the boot disk without issues(only when using a formatted disk, like a IMD disk image that has been formatted already or a normal static disk image(IMA/DSK/IMG format) that's already having all it's sector IDs in the correct place.
Or perhaps it only needs the first track to be properly formatted for the startup disk creation to succeed?

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Reply 49 of 55, by superfury

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OK. Running IMDU on the IMD disk image Windows 95 setup created shows it's correctly formatted and written! (Using WinImage to verify it's contents) 😁

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Reply 50 of 55, by superfury

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OK. MS-DOS 6.22 still requires the /u parameter for format.com, because otherwise it'll try to check the existing disk format, which will report failure and not ready for the unformatted disk, causing format.com to abort(the same effect as Windows 95 executing dir on the floppy disk, the drive not becoming ready).

When specifying the /u parameter, however it proceeds to properly format the disk. That seems to work correctly.
Edit: Just confirmed the floppy disk and DMA emulation now working properly for all 3 operating systems(Windows NT 3.1, MS-DOS 6.22 and Windows 95)! 😁

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Reply 51 of 55, by superfury

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Just tried Debian Bo again against the current FDC emulation.

I see it's somehow actually executing 4 sense interrupts after resetting the controller, which clears the ST0's error indication bits after that(although still returning the bits set on the last drive(drive #3, which together with drive #2 doesn't exist)).
Then immediately after the results are in, it somehow starts another Sense Interrupt command, which of course errors out as an invalid command, returning ST0=0x80? The linux driver doesn't seem to like that?

That's at line 1720 of the linux 2.0.33's floppy.c driver(linux/drivers/block/floppy.c). But isn't an IRQ supposed to happen when the floppy is reset?

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Reply 52 of 55, by superfury

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Just adjusted the reset IRQ to occur after 20us. Anyone knows what the exact timing is? Linux 2.o.33's floppy driver seems to depend on it?

Also, just tried changing the behaviour for unmounted floppy disk drives(drives without any media inserted) to instead of hanging the controller(as Bochs does) actually give an error result with ST0.Ready=0 in it's reporting.
Turns out, with Read ID on Windows NT it just infinitely tries to re-execute the command incorrectly and thinks the disk is unformatted, while Windows 95 thinks the disk is unformatted.

So the only correct behaviour seems to be to hang the controller when unmounted, give the error result when unformatted, error out in another way when the sector isn't found(same error with the first sector not being found), and the next sector not being found giving a slightly different error(the sector following the previous sector is a mismatch instead of a nothing found at all). And of course the final result that can happen is the sector normally being found, in which case the result code becomes a normal success value(with any specific flags set when the cylinder ID etc. isn't matched, WC, Deleted sector marks encountered etc.), otherwise it's erroring out in a normal documented way(according to the documentation).

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Reply 53 of 55, by superfury

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OK. After fixing some behaviour on the FDC(IMD disk image Read ID command to properly detect the amount of sectors on the selected track, not hanging up the FDC when a Sense Interrupt command after the result byte of 0x80 is sent completes(instead returning to command mode, as the documentation says), DumpReg and unknown commands not raising an IRQ, Drive polling mode still needing to raise an IRQ after reset when it's disabled, unknown FDC commands always reporting 0x80 for the result(not adding in the drive number, physical head and not ready/unit check bits to the result, instead clearing them)).

Now Linux seems to see that a disk is in there and is able to mount and read it(haven't tested writing/formatting, though).

I only still see issues with disk changing somehow? When I change the disk, Linux doesn't seem to notice that the disk is changed(I see no reads from the disk change flag(the DIR register's highest bit)). I do see that the reset procedure clears said flag, which should be correct behaviour?

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Reply 54 of 55, by superfury

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Just improved a slight behavioural thing: when seeking during an implicit seek, it will now seek according to the current idea of the cylinder compared to the requested cylinder of the command. When the idea is different from what is requested, instead of what it did before(making the idea and physical cylinder the value of the requested cylinder), it will now actually try to seek the difference between the requested cylinder and the idea of the current cylinder. And said difference is also increasing the physical cylinder by the same amount, which will (like the seek command already did) now clip to the last track of the disk(which it didn't before). So if the physical cylinder is misaligned(track 0 isn't track 0), it will stay that way, unless seeking back to track 0 will cause it to clip back to 0, at which point the idea and physical track position become aligned again.

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Reply 55 of 55, by superfury

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OK. One little question: what happens when a multi-sector read is performed while for example the sector numbers on the disk are interleaved? E.g. 1,9,2,8,3,7,4,6,5 and reading 9 sectors from sector 1 onwards using a read data command? Will the FDC read 9 sectors? Or will it abort after 1 sector with an error message?

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