VOGONS


First post, by superfury

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I notice that although UniPCemu's ET4000 with Sierra Hi-Color DAC seems to run without issues, Windows 95 RTM still lists a 32-bit color option in the display settings(all other options up to 16-bit/Hi-color modes run without issues)? When selecting the 32-bit color option, the display gets screwed up(probably because the DAC can't render 32-bit pixels in any way)?

Anyone knows more about this?

void et34k_updateDAC(SVGA_ET34K_DATA* et34kdata, byte val)
{
et34kdata->hicolorDACcommand = val; //Apply the command!
//bits 3-4 redirect to the DAC mask register.
//bit 0 is set if bits 5-7 is 1 or 3, cleared otherwise(R/O)
//bits 1-2 are stored, but unused.
//All generic handling of the ET3K/ET4K Hi-color DAC!
if (((val & 0xE0) == 0x20) || ((val & 0xE0) == 0x60)) //Set bit 0?
{
et34kdata->hicolorDACcommand |= 1; //Set!
}
else //Clear bit 0?
{
et34kdata->hicolorDACcommand &= ~1; //Clear!
}
//et34kdata->hicolorDACcommand |= 6; //Always set bits 1-2?
//getActiveVGA()->registers->DACMaskRegister = (getActiveVGA()->registers->DACMaskRegister&~0x18)|(et34kdata->hicolorDACcommand&0x18);
et34kdata->hicolorDACcommand &= ~0x18; //Ignore the shared bits for the result!
}
	//16-bit DAC support(Sierra SC11487)!
case 0x3C6: //DAC Mask Register? Pixel Mask/Command Register in the manual.
if (et34kdata->hicolorDACcmdmode<=3)
{
et34kdata->hicolorDACcmdmode = 0; //Stop looking?
return 0; //Execute normally!
}
//16-bit DAC operations!
et34k_updateDAC(et34kdata,val); //Update the DAC values to be compatible!
et34kdata->hicolorDACcmdmode = 0; //Disable command mode!
VGA_calcprecalcs(getActiveVGA(),WHEREUPDATED_DACMASKREGISTER); //We've been updated!
//et34kdata->hicolorDACcmdmode = 0; //A write to any address will reset the flag that is set when the pixel read mask register is read four times.
return 1; //We're overridden!
break;
case 0x3C7: //Write: DAC Address Read Mode Register ADDRESS? Pallette RAM read address register in the manual.
case 0x3C8: //DAC Address Write Mode Register ADDRESS? Pallette RAM write address register in the manual.
case 0x3C9: //DAC Data Register DATA? Pallette RAM in the manual.
et34kdata->hicolorDACcmdmode = 0; //Disable command mode!
return 0; //Normal execution!
break;
		//16-bit DAC support(Sierra SC11487)!
case 0x3C6: //DAC Mask Register?
if (et34kdata->hicolorDACcmdmode<=3)
{
++et34kdata->hicolorDACcmdmode;
return 0; //Execute normally!
}
else
{
*result = et34kdata->hicolorDACcommand;
*result |= (getActiveVGA()->registers->DACMaskRegister&0x18); //Add in the shared bits!
return 1; //Handled!
}
break;
case 0x3C7: //Write: DAC Address Read Mode Register ADDRESS? Pallette RAM read address register in the manual.
case 0x3C8: //DAC Address Write Mode Register ADDRESS? Pallette RAM write address register in the manual.
case 0x3C9: //DAC Data Register DATA? Pallette RAM in the manual.
et34kdata->hicolorDACcmdmode = 0; //Disable command mode!
return 0; //Execute normally!
break;

It's a Sierra SC11487 DAC that's emulated.

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UniPCemu for Android, Windows and PSP on itch.io
Older UniPCemu PC/Android/PSP releases

Reply 1 of 1, by superfury

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Hmmm... Do writes to the DAC command register update bits 3 and 4 of the DAC Mask Register?

UniPCemu Git repository
UniPCemu for Android, Windows and PSP on itch.io
Older UniPCemu PC/Android/PSP releases