VOGONS


First post, by superfury

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Does anyone know what happens when a bit in the ELCR is set for ISA interrupt lines? Do they simply start to get ignored(as they're never 'active low')? Or are they always triggering, since they're low most of the time(low being not raised)?

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Reply 1 of 1, by Battler

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I believe that's an erratum in the Intel PIIX/PIIX3 datasheet - I believe the specification update says it should be active high instead.

So the effect is the same as setting the edge/level setting of the PIC (which does not work on the PIIX* precisely because the ELCR is meant to be used instead), except it's per-IRQ instead for all 8 IRQ's handled by that PIC.