First post, by GloriousCow
I have a few questions about the behavior of an 8088 with REP-prefixed string instructions.
What is the state of IP when executing a REP STOSB, for example? Does it point at the REP prefix or the STOSB opcode itself?
The intel docs say:
A repeating string operation can be suspended by an exception or interrupt. When this happens, the state of the registers is pre […]
A repeating string operation can be suspended by an exception or interrupt. When this happens, the state of the
registers is preserved to allow the string operation to be resumed upon a return from the exception or interrupt
handler. The source and destination registers point to the next string elements to be operated on, the EIP register
points to the string instruction, and the ECX register has the value it held following the last successful iteration of
the instruction. This mechanism allows long string operations to proceed without affecting the interrupt response
time of the system.
The phrase "the state of the registers is preserved" implies to me, at least, that there's some mechanism saving these values to be restored on return from interrupt rather than simply relying on the ISR not to modify them, but looking at the source of some other emulators it doesn't appear to handled with any special cases.
Are these values "saved" somewhere and "restored" on IRET or am I just reading too much into the word "preserved"? Can an ISR in theory overwrite them and cause the string instruction to fail to resume properly? (I know that would be an ill-behaved ISR...)
When the interrupt is finished and IP returns to the string instruction, if IP is pointing to the string instruction and not the REP prefix, how does the CPU "remember" it was in a REP?
I know there's a 'bug' with the 8088 where a REP + a segment override prefix won't properly restore the segment override prefix, and I wonder how that fits into the picture as well.