VOGONS


First post, by superfury

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When performing a x86 TSS task switch (using JMPF,CALLF or an IRET(D) with NT set), when is the PDPT 4 entry table (for PAE mode) loaded and verified? Is that done in the context of the incoming(like most other general purpose registers and selectors) or outgoing task?

Author of the UniPCemu emulator.
UniPCemu Git repository
UniPCemu for Android, Windows, PSP, Vita and Switch on itch.io

Reply 1 of 1, by superfury

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OK. Just looked at Bochs. It looks like it generates a plain #TS(incomingTRsel) fault instead of a #GP fault in that case.

Just modified the UniPCemu TSS task switching handling to behave the same (also let the caller throw a #GP or #TS exception accordingly).

Author of the UniPCemu emulator.
UniPCemu Git repository
UniPCemu for Android, Windows, PSP, Vita and Switch on itch.io