Hello,

This runs on Linux, can log everything, but it's not PC/XT, rather IBM PC with PS/2 compatibility:

https://github.com/OpenRakis/Spice86

Right now it runs Betrayal at Krondor, Dune, Hero Quest, Cruise for a Corpse, Dune 2, and a few other games.

I doubt that's what you want since it's not specifically for the PC/XT, but what would be missing ? PC/XT specific features ?

xcomcmdr wrote on 2023-08-13, 20:38:

Hello, […]
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Hello,

This runs on Linux, can log everything, but it's not PC/XT, rather IBM PC with PS/2 compatibility:

https://github.com/OpenRakis/Spice86

Right now it runs Betrayal at Krondor, Dune, Hero Quest, Cruise for a Corpse, Dune 2, and a few other games.

I doubt that's what you want since it's not specifically for the PC/XT, but what would be missing ? PC/XT specific features ?

Thanks!
II don't know anything about the ps/2. But what I'm try to test now is what happens when interrupts are disabled but are unlocked in the 8259, then an interrupt triggered and then sti is invoked.
I'll take a look at spice86

folkert wrote on 2023-08-13, 20:44:

II don't know anything about the ps/2. But what I'm try to test now is what happens when interrupts are disabled but are unlocked in the 8259, then an interrupt triggered and then sti is invoked.
I'll take a look at spice86

I took a look at your assembly code. It shouldn't work: You are sending ICW2 as "00", and comment it as "Interrupt vector 0". You can do that (although it wouldn't be the brightest idea), but you can't expect the keyboard IRQ (IRQ1) to raise interrupt 9 in that case, but the keyboard would raise interrupt 1 instead (just as the processor would do in single stepping). For PC-compatible IRQ mapping, send 08 as ICW2 to the single PIC. For Intel-compliant initialization ("the first 32 interrupt vectors are reserved for Intel purposes"), send 20 as ICW2.

mkarcher wrote on 2023-08-13, 22:28:

folkert wrote on 2023-08-13, 20:44:

II don't know anything about the ps/2. But what I'm try to test now is what happens when interrupts are disabled but are unlocked in the 8259, then an interrupt triggered and then sti is invoked.
I'll take a look at spice86

I took a look at your assembly code. It shouldn't work: You are sending ICW2 as "00", and comment it as "Interrupt vector 0". You can do that (although it wouldn't be the brightest idea), but you can't expect the keyboard IRQ (IRQ1) to raise interrupt 9 in that case, but the keyboard would raise interrupt 1 instead (just as the processor would do in single stepping). For PC-compatible IRQ mapping, send 08 as ICW2 to the single PIC. For Intel-compliant initialization ("the first 32 interrupt vectors are reserved for Intel purposes"), send 20 as ICW2.

Thanks!

Also found an other problem:

1-       cmp send_eoi,#$01
2+       cmp byte send_eoi,#$01

Now it works as designed 😀