What is the state of the EGA/VGA shift register after shifting out it's 8 pixels? Is it always ROL (shifting out at the left) with 8 bits each Shift/Load Rate clock?

Edit: OK. Thinking about what https://hackaday.io/project/6150-beckman-du-6 … -a-new-vga-mode tells about this.
If the EGA/VGA shift registers pull 2 bits from the low and high planes (this can be done in one go, as UniPCemu performs it this way, in packed shift mode) you'd get a shifted size (on the low planes, planes 0 and 1) of 8 pixels times 2 bits, so 16 bits.
Interestingly, those 16 first bits loaded by UniPCemu end up being at bytes 0 and 1 of the mapped 32-bit little-endian variable.
So it can simply decode it as it used to (using the lower 16 bits (planes 0/1) for the lower 2 bits of the pixels shifted out and the upper 16 bits(planes 2/3) as the upper 2 bits for any pixel).
One of the big pros of an c/c++ union (overlapping the 32-bit integer with 4 bytes for the memory planes) is that it has the planes in a 32-bit variable to be able to read it quickly from VRAM (from any address of VRAM) as well as able to take any bits from a random access plane (0-3) specifically to shift out specific data from planes in a optimized way (don't know how it compares to raw registers though. I guess it's probably optimized away by the compiler to use registers anyway?).
Just remember to, when rotating the data on big-endian processors, remember to rotate in little-endian format for it to work properly 🤣

One interesting case of (S)VGA specific behaviour also shows itself using SLR: effectively, using SLR(Shift/Load rate) in '256-color shift mode' is useless? Since it always shifts out 4 bits values for a total of 8 pixels, you'd get 4x8=32 bits. And since the shift register itself is 32-bits wide, any use of SLR would simply repeat the first 8 pixel attributes over and over for 2 or 4 character clocks. The end position of shifting in both clocking modes (2 and 4 character clocks or anything more than 1 character) would wrap around the register in it's entirety (32 bits shifted left by multiples of 32 bits for every character clock, thus having no effect). All it would do is duplicate the same 8 attributes over and over again.