alvaro84 wrote on 2025-02-10, 14:34:The jumper bridge is in position, I rarely use this board with anything else than socket 4 CPUs.
That's interesting to see! Would you be able to take a closeup of the jumper board from both sides?
Thanks for your pic, alvaro. I see the jumper board is just a huge copper pour connecting everything except the middle 4 pins? That's the same as how I wired it, except I didn't connect 1 of the pins in the middle. It's hard to tell if it's connected. Would also like a better picture, please.
spacesaver wrote on 2025-02-11, 07:22:Thanks for your pic, alvaro. I see the jumper board is just a huge copper pour connecting everything except the middle 4 pins? That's the same as how I wired it, except I didn't connect 1 of the pins in the middle. It's hard to tell if it's connected. Would also like a better picture, please.
Sorry, lately I've got limited to my phone... so you'll have to deal with the image quality it can provide... however I try to take close-ups...
(What annoys me the most is that I couldn't even resize these pics. Daamit. No, I definitely don't feel at home here on Android....)
Shame on us, doomed from the start
May God have mercy on our dirty little hearts
As others have said.
60/66 pentiums in socket 4 are 5V, therefore no need for VRM.
If using 75MHz thru 133MHz , you do need to use socket 5 and 3.3V VRM installed.
Cheers,
Great Northern aka Canada.
Alvaro84, can you confirm or not if the cache module is required for boot? It should in theory not be.
If it is, then it makes sense that the 3.3v VRM makes the system boot with the 3.3v cache module and the P5 Socket 4 Pentium installed.
vetz wrote on 2025-02-11, 19:14:Alvaro84, can you confirm or not if the cache module is required for boot? It should in theory not be.
If it is, then it makes sense that the 3.3v VRM makes the system boot with the 3.3v cache module and the P5 Socket 4 Pentium installed.
This is also my operating theory but in a previous post he said it will not POST at all without the cache module IIRC
OK, I've connected all 6 pins (5 earlier) on the P5 power connector together in the same way as the jumper board does. It still doesn't POST, unless the 3.3V regulator is plugged in. But I know what's going on now. Without the 3.3V regulator, the cache voltage is ~0 ! That means DEC designed the P5 and P54C cache modules to draw power from different pins. You can clearly see the fingers are different in the earlier pictures.
With the 3.3V regulator plugged in, the cache voltage and the regulator output voltage are both 4.9V (probably overriden by the P5 jumpers). So, I think the mystery has been solved, even though I haven't managed to run socket 4 without the 3.3V regulator yet. I just need to find a 5V cache module. It's pretty miraculous, the 3.3V module hasn't been destroyed by applying 5V.
spacesaver wrote on 2025-02-12, 12:56:OK, I've connected all 6 pins (5 earlier) on the P5 power connector together in the same way as the jumper board does. It still doesn't POST, unless the 3.3V regulator is plugged in. But I know what's going on now. Without the 3.3V regulator, the cache voltage is ~0 ! That means DEC designed the P5 and P54C cache modules to draw power from different pins. You can clearly see the fingers are different in the earlier pictures.
With the 3.3V regulator plugged in, the cache voltage and the regulator output voltage are both 4.9V (probably overriden by the P5 jumpers). So, I think the mystery has been solved, even though I haven't managed to run socket 4 without the 3.3V regulator yet. I just need to find a 5V cache module. It's pretty miraculous, the 3.3V module hasn't been destroyed by applying 5V.
if this were the case then you should be able to remove the 3v3 reg and power the 3v3 cache with 5v by using the jumpers, no?
issues with overvolting the cache module notwithstanding, of course! not suggesting it for long term use, but if you're already doing it...
but what doesn't really add up here is where you said the different cache modules draw power from different pins. if that were true then why would the cache voltage be 4.9v with the regulator installed? if the pins are different how could the 5v jumpers be pulling the 3v3 pins up??
I'd suggest you spend some time with a multimeter tracing where all these header pins go before mucking around any further with power applied
spacesaver wrote on 2025-02-12, 12:56:OK, I've connected all 6 pins (5 earlier) on the P5 power connector together in the same way as the jumper board does. It still doesn't POST, unless the 3.3V regulator is plugged in.
Ok, from alvaro84's pictures it is now clear that these 6 pins are connected, but what about the other 4? What if they are connected on the other side of the small "jumper" PCB?
A quick test with multimeter and an explanation of which pins are connected where would have been more helpful.
The word Idiot refers to a person with many ideas, especially stupid and harmful ideas.
This world goes south since everything's run by financiers and economists.
This isn't voice chat, yet some people overusing online communications talk and hear voices.
analog_programmer wrote on 2025-02-12, 15:40:Ok, from alvaro84's pictures it is now clear that these 6 pins are connected, but what about the other 4? What if they are conne […]
spacesaver wrote on 2025-02-12, 12:56:OK, I've connected all 6 pins (5 earlier) on the P5 power connector together in the same way as the jumper board does. It still doesn't POST, unless the 3.3V regulator is plugged in.
Ok, from alvaro84's pictures it is now clear that these 6 pins are connected, but what about the other 4? What if they are connected on the other side of the small "jumper" PCB?
A quick test with multimeter and an explanation of which pins are connected where would have been more helpful.
The top left green pin is not connected as its missing PIN on the header on the motherboard. Tbh I think the remaining (green) pins are not connected at all, atleast it appears that way, but ofc cannot 100% confirm unless you check with multimeter.
vetz wrote on 2025-02-12, 18:23:The top left green pin is not connected as its missing PIN on the header on the motherboard.
Yeah, your note is correct. I forgot that this is a "key" pin and it is missing on the motherboard's connector as seen on the other pictures. So, there are three pins that may be connected to the other side of the tiny "jumper" PCB.
vetz wrote on 2025-02-12, 18:23:Tbh I think the remaining (green) pins are not connected at all, atleast it appears that way, but ofc cannot 100% confirm unless you check with multimeter.
alvaro84 can tell for sure, if he tests them on the "jumper" PCB with a multimeter. The other way is spacesaver to look for where they are connected (if they are connected to something) on the motherboard.
The word Idiot refers to a person with many ideas, especially stupid and harmful ideas.
This world goes south since everything's run by financiers and economists.
This isn't voice chat, yet some people overusing online communications talk and hear voices.
I've measured the connectivity, but it only confirms what I already suspected.
The points probed were, VCC & VSS in each socket, VCC & VSS on the cache module, and around the chipset.
As already said, the "Celebris Pentium PC" manual says, "Also, do not remove the external cache module. Removing the external cache module prevents the computer from operating correctly." Without the 3.3V regulator, the 3.3V cache won't get any power, so that explains why it won't POST. I still haven't been able to find a 5V cache module.
I also finished building an open frame case.
Well if the motherboard will not operate without a cache module and you cannot find a 5V cache module, that would be the end of the line IMO
Even if you bodge something together to allow you to provide 3v3 power to the 3v3 cache while still installing a heatsink on the P60, you would still be over volting the cache chips' data pins with the 5V logic levels.
No boot without COASt module or how a crippled BIOS makes the mobo even more cripple. At least now it is clear that without using 5 V COASt module this board is limited to socket 5 CPUs only.
The word Idiot refers to a person with many ideas, especially stupid and harmful ideas.
This world goes south since everything's run by financiers and economists.
This isn't voice chat, yet some people overusing online communications talk and hear voices.
Data pins exceeding the supply voltage will cause latchup. That would be even worse than overvolting. I think I've burned up many microcontrollers from having voltage on the data lines before applying power. https://www.analog.com/media/en/technical-doc … 809090an109.pdf : "Digital inputs should not be allowed to exceed Vdd by more than 0.3 volts at any time"
I didn't know there was a standard called COASt. This DEC cache is definitely on a stick, but I don't think it's using that standard because the pin connectivity looks too different from other 486/pentium cache modules on eBay. Also, most COASt modules are for synchronous SRAMs, while these chips definitely don't have a clock. Maybe this is COASt 1.0 ? I can't find any pinout for that.
Hurray, vetz is going to sell me his 5V cache module. Appreciate it.
At last ! I have the 5V cache module and can properly run socket 4 without the 3.3V regulator and overvolting the cache. I did some testing with a 60 MHz Pentium 1 overclocked to 66 MHz.
The Quake 1 timedemo 1 gets 18.9 frames/s @320x200
I wanted to experience some advanced Windows 3.1 games, so have been playing Fury 3.
https://www.dropbox.com/scl/fi/8o2tv0lmuhyyj5 … t=eunvlkpb&dl=0
Thank you vetz for selling me the cache. Socket 4 is pretty rare, so it feels good that I added a unicorn to my collection.
