h-a-l-9000 wrote:hs3 EGA: One EGA card shows that column, the other doesn't. Unfortunately I don't have an original IBM EGA card.
Michael Abrash in the book The ZEN Of Graphics Programming wrote:
------------------------------------------------------------------
On the VGA, reading AC registers is a bit different from writing to them. The AC Data register can be read from 3C0H, and the AC register currently addressed by the AC Index register can be read from 3C1H; reading does not affect the state of the AC index/data toggle. Listing 8.2 illustrates reading from and writing to the AC registers. Finally, setting the start address registers (CRTC registers 0CH and 0DH) has its complications. As with the split screen registers, the start address registers must be set together and without interruption at a time when there’s no chance of a partial setting being used for a frame. However, it’s a little more difficult to know when that might be the case with the start address registers than it was with the split screen registers, because it’s not clear when the start address is used.
You see, the start address is loaded into the EGA’s or VGA’s internal display memory pointer once per frame. The internal pointer is then advanced, byte-by-byte and line-by-line, until the end of the frame (with a possible resetting to zero if the split screen line is reached), and is then reloaded for the next frame. That’s straightforward enough; the real question is, Exactly when is the start address loaded?
In his excellent book Programmer’s Guide to PC Video Systems (Microsoft Press) Richard Wilton says that the start address is loaded at the start of the vertical sync pulse. (Wilton calls it vertical retrace, which can also be taken to mean vertical non-display time, but given that he’s testing the vertical sync status bit in the Input Status 0 register, I assume he means that the start address is loaded at the start of vertical sync.) Consequently, he waits until the end of the vertical sync pulse to set the start address registers, confident that the start address will not take effect until the next frame.
I’m sure Richard is right when it comes to the real McCoy VGA IBM and EGA, but I’m less confident that every clone out there loads the start address at the start of vertical sync.
------------------------------------------------------------------
The book can be taken here:
http://rapidshare.com/files/256752180/Abrash_ … amming.rar.html
Look Chapter 8: Video Est Omnis Divisa; Notes on Setting and Reading Registers
I recommend to read all Chapter 8.