Reply 40 of 46, by Deunan
A BIOS option "Slow refresh" will usually bring the DRAM refresh rate to 1/4 of the original value - some 64ms vs 16ms. Note that the performance improvement is single % at best (depends on the CPU, I suppose it would matter more for slower CPUs with no cache) while the risk of glitches raises considerably. Espcially at higher temperatures. It does save some power though so it's mostly used in laptops equipped with low-power DRAM chips that are less susceptible to charge drift.
Anyway, you can't use utils meant fo Cyrix on a "real" 486. A full-featured 486 can both invalidate cache entries one by one with bus snooping or flush everything, a DLC/SLC CPU can only flush. Both can use KEN signal but Cyrix has additional internal registers to define cache exclusion zones CPU-side. There's no burst transfer on Cyrix since there are no signals for chipset to control these, even if the chipset was a 386/486 combo one that actually could do it.
All that extra glue logic on the adapter PCB might allow certain "hacks", like maybe if the chipset does drive CPU address lines properly during DMA cycles you could use that for cache invalidation. If not you can only flush, and detecting when to do it might not be possible so you have to flush on each bus hold. There are software workarounds like trapping BIOS disk interrupts and doing INVD/WBINVD in the TSR, but that works only in DOS and any app doing low-level disk/floppy access, or using protected-mode 32-bit OS-native drivers, will fail.
In general I'd suggest using utils that came with the CPU adapter and only that. Anything else is like trying to drive a nail in by throwing a hammer at it. Might just work if you hit it right but mostly will not. There might be some hidden features or parameters not explained in the manual so disassembling the app might help you learn more - but note that most TSRs use various coding tricks and obscure DOS functions and structures so analysis is usually difficult.