Re: Properly emulating 80286+ multitasking protected mode with all exceptions etc.?

Posted on 2016-08-12, 02:17

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by crazyc

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You say it's because the segment limit is exceeded. But when -1 is loaded, the segment limit is effectively 0xFFFF? So address 0x000-0x800 fall within range, not triggering an exception? -1 is the pointer the idt base and limit are loaded from, not the base and limit itself and the read will be 5 …

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Re: Properly emulating 80286+ multitasking protected mode with all exceptions etc.?

Posted on 2016-08-10, 13:05

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by crazyc

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I think both will work. Because if you use LIDT -1, it seems the LIDT itself will just load a pointer, and not perform an access check. So the int 1 they fire off after that, will access the IDT, which will cause a fault because it cannot be accessed, causing another fault that the IDT is 'invalid' …

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Re: Properly emulating 80286+ multitasking protected mode with all exceptions etc.?

Posted on 2016-08-10, 00:38

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by crazyc

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So the LIDT -1 would result in a valid IDT at the wrong place in memory? Thus the CPU will happily executes whatever IDT entry it finds there and only if it contains data causing an exception, it will result in an exception. Else the triple fault won't happen. Nope, LIDT is a pointer to the new …

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Re: Properly emulating 80286+ multitasking protected mode with all exceptions etc.?

Posted on 2016-08-08, 00:10

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by crazyc

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Yep, on AT hardware, the shutdown signal triggers a processor reset. Actually not so obscure though as Windows standard mode does too (and it happens a lot). 80286 only though as (except for the odd exception of IBM OS/2 1.0) on the 386, protected mode is exited on both Windows and OS/2 1.x the …

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Re: What are GOOD PC emulators ?

Posted on 2016-08-07, 19:53

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by crazyc

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We don't yet emulate 8087s or 80287s yet although there's at least one partially working machine that requires it so that's on the todo list.

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Re: Properly emulating 80286+ multitasking protected mode with all exceptions etc.?

Posted on 2016-08-07, 19:52

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by crazyc

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The manual is pretty clear about the order. Exceptions caused by an invalid new tss should happen in the current task. Otherwise exceptions caused by faults in selectors loaded from the new tss happen in the new task. Exceptions throwing exceptions would result in a double fault which likely result …

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Re: 808x and prefetch

Posted on 2016-05-15, 17:36

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by crazyc

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Not to mention the specification is sometimes wrong/often incomplete.

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Re: CGA on VGA emulation in x86EMU?

Posted on 2016-04-14, 20:03

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by crazyc

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You can really probably just clear ready status changed for all the drives when a new command if sent to the controller (this only works though for machines which don't connect the drive ready line).

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Re: Wanted: PC-98 technical manuals and low level documentation

Posted on 2016-04-14, 19:48

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by crazyc

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If you post a screenshot, I can tell you if there's anything obviously wrong but not anything deeper.

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Re: CGA on VGA emulation in x86EMU?

Posted on 2016-04-14, 19:40

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by crazyc

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The FDC doesn't expect any number of sense interrupts. If the drive polling status changes it will give you the status of all 4 if requested but it isn't required. In fact you don't need to do a sense command at all after a non-read/write interrupt. Any byte written to the controller will clear the …

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Re: Wanted: PC-98 technical manuals and low level documentation

Posted on 2016-04-14, 19:25

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by crazyc

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Does np21w have PCI IDE emulation? If not than it wouldn't be DMA as PC98 ISA (acutally CBUS but the differences aren't important) IDE, like the AT, lacks any useful DMA support. The problem might not even be IDE though, could be a CPU emulation issue.

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Re: Wanted: PC-98 technical manuals and low level documentation

Posted on 2016-04-01, 21:04

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by crazyc

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I've never used an actual machine but probably the high chip uses ~BHE for it's select and the low uses ~A0.

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Re: Wanted: PC-98 technical manuals and low level documentation

Posted on 2016-04-01, 20:28

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by crazyc

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I understand some of the hardware (like the PIT timer and IDE) is sort of the same interface, just moved around to different I/O ports, spaced two I/O ports apart for some reason and interleaved even/odd numbers between devices. Weird. There is a sane reason to interleave the devices like that. …

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Re: Wanted: PC-98 technical manuals and low level documentation

Posted on 2016-04-01, 20:09

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by crazyc

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I learned more than anyone rational would want to know about that machine while working on the mess emulation. If you have any questions, just ask. BTW google translate does a marginally understandable job on the undocumented_mem files.

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Re: Wanted: PC-98 technical manuals and low level documentation

Posted on 2016-04-01, 18:08

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by crazyc

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UNDOCUMENTED 9801/9821 Vol.2 http://www.webtech.co.jp/company/doc/undocumented_mem/ upd7220 datasheet http://bitsavers.trailing-edge.com/pdf/nec/uPD7220-uPD7220A_User_Manual_Dec85.pdf Neko Project 2 https://github.com/nonakap/xnp2 MAME https://github.com/mamedev/mame/blob/master/src/mame/drivers/ …

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Re: x86EMU with 8086/8088 CPU crashes Windows 3.0 (DIVIDE ERRORs and Unknown opcodes)?

Posted on 2016-01-24, 18:11

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by crazyc

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If you are using the Windows 3.0 VGA driver than yes, it'll only work on a V20 or 80286 and higher (no 80186 computer ever had VGA graphics even though in theory it'd work too).

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Re: x86EMU 4-color CGA mode fails retrieving graphics pixels completely?

Posted on 2015-11-09, 22:56

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by crazyc

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superfury wrote: Edit: Fixed by switching the CPU from 80186 to 8086(It seems to need the SALC instruction to run instead of hanging). All Intel x86 CPUs have the SALC insn including the 80186. As Scali points out, it's missing on the v20 where opcode 0xd6 is an alias to xlat.

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Re: 80(1)86 Turbo Pascal 6.0 without FPU?

Posted on 2015-10-14, 23:54

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by crazyc

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A real 80186 controls whether int 7 is triggered when an FPU opcode is used by setting bit 15 of the relocation register. Your CPU emulation is lacking all of the 80186 peripherals (which is fine unless you really want to emulate machines that have an 80186 none of which are PC compatible) so it's …

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Re: OAKCDROM.SYS not detecting my IDE CD-ROM drive?

Posted on 2015-10-14, 23:48

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by crazyc

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superfury wrote: Would a 8086 SCSI driver detect the CD-ROM IDE drive? No. No real SCSI driver is going to understand ATAPI.

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Re: Using the PSP's ME processor to emulate the CPU thread?

Posted on 2015-08-12, 18:17

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by crazyc

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That's right. You just need to make sure the input audio data (SB PCM buffers and OPL register) is flushed from the SC cache and invalidated in the ME cache before processing and flushed from the ME cache when done (since the audio is passed to the DAC via DMA you don't have to do anything with SC …

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