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Re: UniPCemu cycle accurate 8088 implementation

Posted on 2019-05-23, 22:28

Edit: Looking a bit further, it seems all those timings concerning " _accessNumber = " are the timings that are probably missing from UniPCemu(except perhaps the CS/IP-related timings, which don't seem to match at all, perhaps because it's based on one of the earlier replies in this thread instead …

Re: UniPCemu cycle accurate 8088 implementation

Posted on 2019-05-19, 13:12

So perhaps the STOSW instruction is failing for some unknown reason? Also, see my previous post that I edited in just before your post about the missing timings in UniPCemu. Could those be the timings that cause UniPCemu's CPU to miss some EU cycles, thus resulting in the CPU being too fast(and 8088 …

Re: UniPCemu cycle accurate 8088 implementation

Posted on 2019-05-19, 13:02

I'm just wondering. What would be the best way to go and implement those timings from xtce.h from reenigne's repository? Looking at my own source code, I at least implemented the base timings that are in the instruction handlers themselves(those ALU generic functions and all other instructions). …

Re: UniPCemu cycle accurate 8088 implementation

Posted on 2019-05-18, 20:02

Any idea why the vectorballs background isn't fully black? The area that the vectorballs move over is black, but everything else has static noise(like a b/w TV)? Edit: What about the REPable instructions? Are they not used in the credits, but used in those failing parts of the demo?

Re: UniPCemu cycle accurate 8088 implementation

Posted on 2019-05-18, 18:16

Odd that exactly those two are failing atm. One thing I notice as well is noise in an exclusive infinity shape(left circle being larger) during the vectorballs part(so 8 turned sideways, so like Oo, with the IBM logo in vectorballs scraping past the edge(like it's scraping out the noise)? It's like …

Re: UniPCemu cycle accurate 8088 implementation

Posted on 2019-05-18, 17:11

Well, it has the same timing source as I used(reenigne's findings in his emulator code). As far as I can remember, the only possible differences were the handling of REP-prefixable instructions(MOVS etc.) and the HLT instruction. Is HLT even used in 8088MPH? Oddly enough, even with the credits …

Re: UniPCemu cycle accurate 8088 implementation

Posted on 2019-05-18, 12:20

Just was messing around with the DMA timings. Then I noticed that the bus is released on S0(at CPU T4 state), which DMA takes and immediately starts processing S0 the next cycle. As far as I then saw on the DMA timings information, the HLDA is released at T4, but not taken by the DMA until T1(so 1 …

Pentium VME?

Posted on 2019-05-13, 19:32

How is the IR bitmap handled compared to the I/O bitmap? I'd assume it's using default byte values of 0x00 or 0xff when it's not past the I/O bitmap pointer itself(in much the same way it's done for compatibility with the I/O bitmap, but in opposite direction)? What happens when the I/O bitmap …

Re: x86 LOCK signal vs DMA?

Posted on 2019-05-13, 15:46

One little question: From when to when is the lock signal active? As I've currently implemented it, it starts during the first memory access by an instruction with a LOCK(0xF0) prefix(when accessing the first byte in memory, by the BIU, of the byte/word/dword value to be read/written(it doesn't …

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