Re: ABIT AB-AH4 / AB-AH4T Write Back L1 Cache
Posted on 2023-03-03, 15:10
I have a QDI board with the same chipset and with 5x86 running at 3x50MHz. So this thread is very interesting to me. Question about the speedsys' graph - shouldn't we see the blue line (write speed) also represent difference between L1 and L2 cache "space" when write-back is enabled? Wow - are you …