VOGONS


3 (+3 more) retro battle stations

Topic actions

Reply 1520 of 2152, by pshipkov

User metadata
Rank Oldbie
Rank
Oldbie

Good Socket7 information.

I am a bit perplexed why 40mhz Cy6x86 is part of the tests. Whats the story with no_lock ?
Henrick's comment also hints at something important/interesting there.
I obviously need to read on that cyrix guy, but until then, can somebody spell it please ?

In general, looking at the numbers, Cy6x86 was definitelly lacking compared to Intel Pentiums.
This is how i remember it back then as well.

Last edited by pshipkov on 2022-12-14, 06:54. Edited 1 time in total.

retro bits and bytes

Reply 1521 of 2152, by WJG6260

User metadata
Rank Member
Rank
Member

@H3nrik V!
Good idea!
If you think there might be some interest, I can continue this 40MHz 6x86 saga elsewhere.
Just wanted to add the basics here for a clock-for-clock analysis.
Plus, wanted to share the info about 6x86 “classic” and its unique 1x multiplier.

———
@pshipkov
Thank you!
40MHz 6x86 was just more of a proof-of-concept.
The 6x86 is the only Pentium-class CPU w/ a 1x multiplier (as far as I’m aware).
Figured this would be a good opportunity for a clock-for-clock analysis.
40MHz 6x86 is even inferior to the Pentium 60/66 a few pages back! Pretty wild.
For having a faster ALU, the slow FSB is really a drag.

But it is not so much a drag at 40x2, oddly. 40x2 seems kind of between a P75/90 for ALU-intensive tasks.
NO_LOCK is a CPU register unique to the 6x86 and its derivatives.
Cyrixes (on most non-VIA/SIS boards, and even some of those) need to be configured optimally for performance.
Their registers are vast/complex, and even the 5x86 possesses some of this quality.
Most registers don’t do much, but NO_LOCK is documented in the IBM data books for the 6x86.
They say this:

 Negate LOCK#
If = 1: All bus cycles are issued with LOCK# pin negated except page table accesses and interrupt acknowledge cycles. Interrupt acknowledge cycles are executed as locked cycles even though LOCK# is negated. With NO_LOCK set, previously noncacheable locked cycles are executed as unlocked cycles and therefore, may be cached. This results in higher performance. Refer to Region Control Registers for information on eliminating locked CPU bus cycles only in specific address regions.

There’s probably more to it than just that. Maybe someone here can help?
I know there’s some weirdness to it, like how the K5/K6 have “Write Allocate,” which boosts some performance.

The 6x86 was inferior in some regards but the 6x86-P200+ is pretty cool.
Will share some numbers there soon. It’s definitely a fast one.
The 6x86s in general did not get good until the 6x86MX came around.
The MX/MIIs are alright, but vastly overrated in terms of Pentium-rating.
MII-433GP at 300MHz? Marketing at its finest. 🤣
They’re good for integer stuff and decent for Windows/business tasks. In 3D they’re okay with a Voodoo.
But the Pentium is much better FPU-wise. Even in non-Quake games where the code isn’t just Pentium-optimized, it shows.
The K5 is faster FPU-wise, and its design is even older!

Cyrixes are fun as the oddball and the underdog, but that’s about it. Nothing too crazy.
The 6x86-80/90 (whatever you want to call it) must’ve been a real dog/underseller at release.
I guess the rule was buy a P75/P90 and OC (if you can). I’ve found most P75s will do 90 okay.
And a P90 was clearly the better buy!

-Live Long and Prosper-

Feel free to check out my YouTube and Twitter!

Reply 1522 of 2152, by maxtherabbit

User metadata
Rank l33t
Rank
l33t

Received my set of 10x fake ISSI 10ns 128kx8 chips today from the seller linked by pshipkov. Out of the 10 I received, two tested bad in the TL866 SRAM test. The rest good. Which is ok I guess since I really only needed 8, but buyer beware!

Reply 1523 of 2152, by CoffeeOne

User metadata
Rank Oldbie
Rank
Oldbie
pshipkov wrote on 2022-11-14, 19:31:
At 4x40 and 3x50 PVI SP3 works just fine with all BIOS settings on max, but you will need to insert good quality L2 cache chips. […]
Show full quote

At 4x40 and 3x50 PVI SP3 works just fine with all BIOS settings on max, but you will need to insert good quality L2 cache chips.
As stated in previous posts in this thread - having 10/12/15ns rated chips is often not enough. It takes some trial and error to arrange them in a winning configuration by swapping them around until complete stability is reached. Probably the most annoying step with getting 486 system maxed-out.

For 4x48 you will need good CPU that can go past 160MHz on air cooling.
These are very rare. If you don't have big pile of Am5x86-133 chips it will be a pure luck to make it work.

Hello,
I have a - very small - update about my PVI-486SP3 system.
I gave up on the 4 times 128kx8 setup with cache read 2-1-1-1, write 2. Maybe I am not patient enough 🙁
But a small success: I found a set of 8 32kx8 chips working with 2-1-1-1/2 at 50MHz!
Only tested with speedsys, so not really stability tested yet.
But another weird problem came up: speedsys hangs (also with slow cache timings) in the detection of IDE drives.
Since only a floppy was connected, I disabled both onboard IDE controllers and the speedtest runs fine.
Hopefully I did not break something....
So I think I will go for the 256kB cache configuration, even though with 160MHz I could use 512kB.

Reply 1524 of 2152, by CoffeeOne

User metadata
Rank Oldbie
Rank
Oldbie
maxtherabbit wrote on 2022-11-18, 19:22:

Received my set of 10x fake ISSI 10ns 128kx8 chips today from the seller linked by pshipkov. Out of the 10 I received, two tested bad in the TL866 SRAM test. The rest good. Which is ok I guess since I really only needed 8, but buyer beware!

Hi, how do you test the IS61C1024 with the TL866? I recently bought a TL866II-Plus. I don't see a SRAM 128kx8 in my list of chips.

EDIT: I guess Winbond W24010 is valid.
Interesting: from my 2 problematic chips one tests good, but the other comes immediately with data error.

Reply 1525 of 2152, by H3nrik V!

User metadata
Rank Oldbie
Rank
Oldbie
maxtherabbit wrote on 2022-11-18, 19:22:

Received my set of 10x fake ISSI 10ns 128kx8 chips today from the seller linked by pshipkov. Out of the 10 I received, two tested bad in the TL866 SRAM test. The rest good. Which is ok I guess since I really only needed 8, but buyer beware!

Are they tested at the 10ns timing as well, or is it a simple "working/not working at all" test?

Please use the "quote" option if asking questions to what I write - it will really up the chances of me noticing 😀

Reply 1526 of 2152, by maxtherabbit

User metadata
Rank l33t
Rank
l33t
H3nrik V! wrote on 2022-11-19, 06:39:
maxtherabbit wrote on 2022-11-18, 19:22:

Received my set of 10x fake ISSI 10ns 128kx8 chips today from the seller linked by pshipkov. Out of the 10 I received, two tested bad in the TL866 SRAM test. The rest good. Which is ok I guess since I really only needed 8, but buyer beware!

Are they tested at the 10ns timing as well, or is it a simple "working/not working at all" test?

The latter. They did give partial refund for the 2 dead chips

Reply 1527 of 2152, by pshipkov

User metadata
Rank Oldbie
Rank
Oldbie

15ns rated chips are supposed to hit 66mhz.
Not all of them can do it on fast motherboards, even with conservative wait states.
Very very few can do it with tight wait states.
It is inconlusive if 12 and 10 ns rated chips improve on this for real.
I at least prefer to use them in favor of 15ns ones.
At minimum they are not worse.

So, Max, are you able to run your 3x50 LS C1 system at tightest L2 cache timings now ?

retro bits and bytes

Reply 1528 of 2152, by maxtherabbit

User metadata
Rank l33t
Rank
l33t
pshipkov wrote on 2022-11-19, 16:00:

So, Max, are you able to run your 3x50 LS C1 system at tightest L2 cache timings now ?

I already was, this purchase was for a different system

Reply 1529 of 2152, by pshipkov

User metadata
Rank Oldbie
Rank
Oldbie

Alaris Cougar II with Intel Pentium Overdrive (P24T) issue and question.

Been getting a Cougar board to work stably with BL3 processor at 3x33 MHz on air cooling.
Ran a set of tests along the way with 486DX2-66/80 and P24T to check if all is good there.
The 486 tests were all fine, but with P24T POST never completes if L2 cache is present.
Tried hard to overcome the issue with trusted chips, all possible variation of BIOS settings and jumpers.
Without success.
It feels like a motherboard/BIOS issue.
Anyone else seeing the same ?

retro bits and bytes

Reply 1530 of 2152, by WJG6260

User metadata
Rank Member
Rank
Member

@pshipkov
Tested my Cougar w/ 486 and POD a while back, so all I have are some notes.
Wrote down that the board seemed to work fine w/ POD @ 83MHz, not the most stable at 100MHz.
Blamed -20ns L2 at the time and haven't retested since, but can pull the board.
Funny enough--I had some issues with 486DX2s. Board was pickier than can be with some.
Liked Intel, but not AMD. Cyrix was a wash.

When I first bought the board, VL reads/writes were half of what they should have been.
ARK1000VL, for example, was ~12-13MB/s vs ~25MB/s.
Figured this was an issue with the BIOS, so swapped it. Been working normal since then.
Used the BIOS from here on my board.
Thinking yours is a BIOS issue. Have you tried this copy of the MR-BIOS?
It seems a bit different and I'm not sure why.
Asked Michal from the OS/2 Museum, as this is his BIOS.
He posited that the different MR-BIOSes out there for these boards optimize chipset registers differently.
Not sure what the facts are there, but if so, this makes some sense perhaps.

---
@maxtherabbit
Funny enough, I bought about 40 of those L2 chips a while back and ~6 were bad.
Seems hit and miss and failure rates are all over.
Some tested bad immediately, others not so and exhibited weird behaviors.
Definitely seem to be re-labels, but that's okay.
They do their job; hope yours serve you well, and glad you got the exact # you needed 😀

---
@H3nrik V!
I don't know if anyone has tested these at 10ns, but it'd be interesting to see.
They are definitely re-marked.
Winbond and UMC (I think) made 10ns parts. ISSI, I am not sure.
Feipoa did some investigation a while back and reached out to the manufacturers.

---
@CoffeeOne
I have tested mine as 628128 standard SRAMs w/ a TL866II.
Seems to work best and catches most/all bad chips.
Interesting observations regarding the PVI.
Thinking double-banked 256k is the way to go as well, for ease at least.
Either way, seems like good progress! 😁

-Live Long and Prosper-

Feel free to check out my YouTube and Twitter!

Reply 1531 of 2152, by H3nrik V!

User metadata
Rank Oldbie
Rank
Oldbie
WJG6260 wrote on 2022-11-22, 02:36:
@H3nrik V! I don't know if anyone has tested these at 10ns, but it'd be interesting to see. They are definitely re-marked. Winbo […]
Show full quote

@H3nrik V!
I don't know if anyone has tested these at 10ns, but it'd be interesting to see.
They are definitely re-marked.
Winbond and UMC (I think) made 10ns parts. ISSI, I am not sure.
Feipoa did some investigation a while back and reached out to the manufacturers.

Very interesting, thanks for pointing it out

Please use the "quote" option if asking questions to what I write - it will really up the chances of me noticing 😀

Reply 1532 of 2152, by pshipkov

User metadata
Rank Oldbie
Rank
Oldbie

Chicony CH-471B rev 2.0 based on SiS 85C471 - one more item to the list of 486 motherboards with 1024Kb L2 cache.

The fastest classic ISA/VLB motherboard.

Didn't think i will ever see Ark1000VL and S3 Trio64 video cards ticking reliably at 66MHz base frequency with the CPU running at 200MHz.
Some impressive results in interactive DOS graphics and Windows GUI because of that.

It also looks badass:
motherboard_486_chicony_ch-471b.jpg

An unique assembly for 486 ISA/VLB class hardware.
There is an on-board Appian ADI/2 EIDE controller with integrated driver in the BIOS.
For reference, one of the best EIDE controllers from that time - the Adaptec AVA-2625VL is relabled ADI/2 silicon.
So we have a cool Adaptec EIDE on board.
Support for 4 drives (only 2 of them VLB EIDE, the other 2 are standard IDE interface), 2 floppies, 2 COM and 1 LPT ports.

Clock generator and jumpers cover the full range of frequencies - 25, 33, 40, 50, 60, 66, 80 MHz.

The large amount of through-hole components suggests early/mid design and release date.

Not very pretentious about L2 cache chips.
Took a moment only to find working configuration.
Something that is simply not granted for 1Mb L2 cache buffer with tight wait states.

Jumper setup is a bit messy. Took a while to figure out the configuration for Am5x86.
Most manuals online are incorrect or don't list the processor entirely.
Picture above shows a working setup.

Am5x86's level 1 cache is stuck in write-through mode. The corresponding pin is connected to GND somewhere in the middle layers of the PCB.
Used the simple adapter from this post to enforce WB mode.

If ISA BUS SPEED is set to anything but 7.159 MHz (BIOS parameter) the keyboard controller starts missing strokes.

No support for EDO RAM. Something expected for this chipset.

--- Am5x86 at 160MHz (4x40)

All BIOS settings on max.
chicony_ch-471b_bios_160.jpg

Ark1000VL requires LOCAL BUS READ = SYNCHRONIZE and CACHE BURST READ = 2T (1T is best) which results in lowered overall performance.
Used Diamond's S3 Trio64 instead.

SpeedSys reports great metrics.
One of the best on-board IDE controllers - on par with Asus PVI.
Nice memory and L1/L2 cache numbers.
chicony_ch-471b_speedsys_160.png

benchmark results

While slower than Asus VLI and PVI this is still an excellent 486 motherboard.
Very satisfying experience.

--- Am5x86 @ 180MHz (3x60)

All BIOS settings on max, except:
DRAM SPEED = SLOWER (best is FASTEST)
CACHE BURST READY = 2T (best is 1T)
LOCAL BUS READY = SYNCHRONIZE

A nice side effect of the last 2 parameters (mandatory for 180 and 200 MHz) is that Ark1000VL works and produces better performance for DOS interactive graphics than S3 Trio64.

First time seeing Ark1000VL and S3 Trio64 ticking reliably at 60MHz.
S3 Trio64 managed with 0 wait state while Ark1000VL required its wait states to be set to 1.

BIOS:
chicony_ch-471b_bios_180_200.jpg

Speedsys:
chicony_ch-471b_speedsys_180.png

Used Ark1000VL for DOS interactive graphics and S3 Trio64 for Windows accelerated GUI.
In some cases background panels in Windows GUI can get pixel corruption with the S3 Trio64 card running at 0-waits.
benchmark results

While not quite on par with later 486 designs, it is impressive for an ISA/VLB system.
But it only gets better ...

--- Am5x86 @ 200MHz (4x50)

Same BIOS settings and notes from the 3x60 configuration.
Ark1000VL runs at 0-wait states here.

Speedsys:
chicony_ch-471b_speedsys_200.png

Used Ark1000VL for DOS interactive graphics and S3 Trio64 for Windows accelerated GUI.
In some cases background panels in Windows GUI can get pixel corruption with the S3 Trio64 card running at 0-waits.
Posting these separately, since this configuration is slower than 3x66, so results are not reflected in the combined charts.
chicony_ch-471b_benchmarks_200.png

While at 3x60 things were behind compared to later model 486 motherboards, at 4x50 DOS interactive graphics are on par, but still lacking in Windows accelerated GUI and complex offline compute.
It is hard to compete against LuckyStar D equipped with Voodoo3 in Windows, also SiS471 in general lacks at complex offline computation tasks compared to SiS 496/497.
Still, it is clear already that this is a very fast classic ISA/VLB motherboard.
But it does not stop here ...

--- Am5x86 @ 200MHz (3x66)

Same BIOS settings and notes from the 3x60 configuration.

DOS interactive tests pass with 32Mb RAM, some of the more complex tests pass with 24Mb, but proper stability is achieved with 16Mb RAM only.
Se la vie.

Speedsys:
chicony_ch-471b_speedsys_200_3x66.png

Used Ark1000VL for DOS interactive graphics and S3 Trio64 for Windows accelerated GUI.
In some cases background panels in Windows GUI can get pixel corruption with the S3 Trio64 card running at 0-waits.
benchmark results

So, what are we seeing here ?
The fastest ISA/VLB system. That's for sure.
Not the fastest clock-to-clock motherboard but its ability to overclock to 3x66MHz without bus dividers places it in a class of its own.
In addition:
The best Wolf3D score to date.
The best Doom score to date.
In general, this guy is starting to take on LuckyStar rev:D in the 200MHz department. Not bad at all.
Of course LSD can go much further on a narrow overclock, but we are talking complete stability here.

--- POD100

Updated the big POD100 post with information about this motherboard.
Short summary:
Things worked mostly as expected.
Intermediate performer.

Using trial and error discovered that jumper 29 in position 2-3 forces the L1 cache in WB mode.
Unfortunately in this configuration the system becomes unstable.
No wonder the manual lists same jumper configuration for P24D and P24T processors, where L1 cache is in WT mode.

---

While the integrated EIDE, multi I/O controllers and 60/66MHz capable clock generator are interesting features on their own, its performance at 160MHz is nothing to brag about.
What makes this assembly truly unique is its ability to handle 200MHz just fine. As mentioned above, so far this is the only SiS 471 based system that can do it with complete stability in place.

Last edited by pshipkov on 2024-04-13, 06:42. Edited 36 times in total.

retro bits and bytes

Reply 1533 of 2152, by pshipkov

User metadata
Rank Oldbie
Rank
Oldbie

Adding one more late 486 motherboard with 1024Kb level 2 cache.

DTK PKM-0033S E-0

motherboard_486_dtk_pkm-0033s_e-0.jpg

Does not support EDO RAM, only FPM modules.
Default BIOS is terrible - DTK style.
Tried to find a more suitable one for proper performance optimization/overclocking.
Tested microcodes from LuckyStar LS-486E rev:D, MSI-4144, Asus PVI-486SP3.
Different problems with all of them - mostly related to the on-board Winbond IDE controller.
To overcome that started testing different PCI IDE adapters. 3Ware 2000-0069-00/200-0033-00 worked best. Rolled with it.
The best BIOS was from Feipoa with unhidden options.

If CPU BURST WRITE is enabled POST never completes (all BIOSes).

Overcomplicated jumpers for level 2 cache setup.
Nice set of CPU voltages.

Finding the right set of chips for 1024Kb level 2 cache was problematic with tight timings. Board is very picky.
Cache timings for Am5x86 CPU must be 2-2-2 or POST does not complete. Tried hard to hit 2-1-2 but without success. Used chips can handle that with other boards.
With 256Kb L2 cache 2-1-2 timings work fine, but slower than 1Mb+222.

Tested graphics performance with several PCI cards. Best results were achieved with Voodoo3 and Matrox Millennium. Identical outcome for the two.

Using the top-most RAM slots results in improved stability.

--- Am5x84 @160MHz (4x40)

All BIOS settings on max except:
CPU BURST WRITE = DISABLED
L2 CACHE TIMINGS = 2-2-2

What SpeedSys reports:
486_dtk_pkm-0033s_speedsys_160.png

benchmark results

Clearly a slow assembly.

--- Am5x86 @180MHz (3x60)

System is stable only if automatic timings configuration is used in BIOS. Anything else leads to POST not completing.

SpeedSys:
486_dtk_pkm-0033s_speedsys_180.png

The usual set of benchmarks:
benchmarks_486_dtk_pkm-0033s_180.png

While things work, results are unexciting.

--- Am5x86 @200MHz (4x50, 3x66)

No lights no matter what.

--- POD100 (P24T at 2.5x40)

Trouble-free experience.
All BIOS settings on max except:
CPU BURST WRITE = DISABLED
L2 CACHE TIMINGS = 2-2-2 (Works with 2-1-2 but not completely stable.)

Performance results shared in the POD100 extensive testing, summary post.

Last edited by pshipkov on 2023-02-27, 02:10. Edited 1 time in total.

retro bits and bytes

Reply 1534 of 2152, by feipoa

User metadata
Rank l33t++
Rank
l33t++

I also had trouble fine-tuning this board, and ultimately decided that it was best suited for a 33 MHz FSB and a Cyrix 5x86-133/4x.

I'm surprised you couldn't get 4x40 going with Am5x86 and 1024K. Limit RAM to single stick of 32 MB and run the Am5x86 at 3.6 V. I noticed the Am5x86 didn't run well at 3.45 V on this board.

CPU BURST WRITE is for use with the Cyrix/IBM 5x86, but I think it should also work with the POD. Try it with a 33 MHz FSB.

I am surprised that you were able to find one of these boards without any sign of battery leakage. I've had two and both needed cleanup.

Plan your life wisely, you'll be dead before you know it.

Reply 1535 of 2152, by pshipkov

User metadata
Rank Oldbie
Rank
Oldbie

4x40 + 1024Kb L2 cache is fine.
My crammed posts are not a straightforward read.

CPU BURST WRITE - noticed some other boards have an issue with that with non Cy-5x86/P24# CPUs.

retro bits and bytes

Reply 1536 of 2152, by maxtherabbit

User metadata
Rank l33t
Rank
l33t
pshipkov wrote on 2022-12-03, 16:59:

4x40 + 1024Kb L2 cache is fine.
My crammed posts are not a straightforward read.

CPU BURST WRITE - noticed some other boards have an issue with that with non Cy-5x86/P24# CPUs.

I could never get my lucky star to boot with that enabled either (Am5x86)

Reply 1537 of 2152, by WJG6260

User metadata
Rank Member
Rank
Member

@pshipkov
Interesting developments with the Chicony CH-471B.
Seems on paper to be a nice board.
A shame about the 3x/4x issues. Seems reminiscent of the FIC VIP-IO saga.
At 3x60 it seems solid. Nice that it doesn't seem picky on L2 chips.
I can't help but wonder--does the BIOS set the dirty tag correctly for L2 WB?
The one example of this board on TRW notably has an older SiS471 date code (and maybe older rev?).
I wonder if this was a model made for some time? Or if it was phased out?
Either way, things might get more interesting if that 4x issue can be overcome somehow.
POD100 numbers seem in-line with expectations.

Re: DTK PKM-0033S E-0
Nice looking board.
Metrics seem okay at 160/180.
Looks like FPU performance is not too great, like on the QDI V4P895GRN.
Cool to see that it takes 1024k L2, but shame that it is picky.
Mind sharing what the CPU voltage options it offers are?

---
@feipoa
Does CPU BURST WRITE on the PKM-0033S E-0 refer to Linear Burst, or is it something else entirely?
It's interesting to see your notes suggesting this board is best suited at 33MHz w/ a Cyrix 133/4x.
Seems like it's not too bad at 60MHz FSB or even 40MHz FSB. Are there stability issues with these boards?

---

IMG_3454.jpg
Filename
IMG_3454.jpg
File size
1.53 MiB
Views
1643 views
File comment
S3 Vision868
File license
CC-BY-4.0

Been meaning to get back to the testing for a while and had to scratch a simple itch.
Thought about the S3 864/Trio64 saga, and the subpar appearance of the S3 Vision868 in my roundup.

What didn't make sense is that the 864 core = Trio64 core, and 868 = Trio64V+ core.
Trio64V+ is known to be "faster" than the Trio64, although that is a relative term.
Why was the 868 then slower than the 864 and Trio64?
Been wracking my brain and figured it's Miro's implementation.

Figured a proper sample of the 868 would give some insight vs 864/Trio64.
Lets us all see what changed under the hood, other than adding YUV->RGB and Zoom MPEG-1 "acceleration" features.

Finally got around to testing a suitable sample of the S3 Vision868.
The Miro20SD wasn't cutting it.
Tried dropping in the Diamond Stealth Video v1.01 BIOS (868 PCI card).
Didn't work.

Was frustrated but came across another option.
Found this bad boy: the Diamond Stealth64 DRAM w/ S3 Vision868.
This card is indeed the same card as the PCI/VLB Diamond Stealth Video 2xx0.

There's a few versions of this PCB out there. Some have the Vision864 and some even have the Trio64.
For this model, Diamond changed the name, so I dropped in the newer revision BIOS from the PCI card and went to town.
Differences were non-existent between the newer/older BIOS, but I liked the green "Stealth64 Video" sticker.

Plus, the numbers were slightly--ever-so-slightly--more consistent, as in 0.1fps more in DOOM almost always, rather than sometimes.
Tried things out with the SuperEISA setup from before. Noticed a huge difference.

In DOS, this card is marginally faster than the Diamond S3 Trio64.
In Windows, it's chasing the heels of the Vision964 and beats the Trio64.
Impressive stuff.

Numbers are here with other VLB cards and here with all the S3 cards I can muster.

All in all, a great card. Would easily take this one to be the peoples' champion, barring the Trio64V+.
Seems like some tweaking and a better board might let this one chase the ARK1000VL. Maybe.
Either way, it's a beastly card.

Also, this rounds out something we've all beaten to death here.
Implementation, implementation, implementation--the keys to a good chipset right there.
The Miro20SD is okay. This? Phenomenal.
Diamond is always a good bet for top-tier performance.

P.S. On an unrelated note, added more cards to the VLB roundup on the first link above. Mach32 Graphics Ultra+ DRAM, Mach64 (issues on SuperEISA), and this card are all entered and recorded for reference. Individual charts will follow, but for now the total "big-picture" roundup is there.

-Live Long and Prosper-

Feel free to check out my YouTube and Twitter!

Reply 1538 of 2152, by gonzo

User metadata
Rank Member
Rank
Member

I completely agree with all the "nice" surprises here with the PC-Chips M919.

To add my short experience with it:
- my board-revision is 3.4B/F (no FAKE-chips soldered on it)
- BIOS-version is 09/15/98 S (no idea if the "S" is important or not)
- L2-module is an original 256-KB-coast
- one piece of 16 MB FPM-RAM
- an AMD-DX5-133 and a Cyrix 5x86-100
- NO POST with a Voodoo 3 2000 (original 3dfx-manufacturing)

For CPU-speeds of 100 or more MHz "cachecheck" always tells me, the L2-cache is FAKE.
At CPU-speed of 66 MHz, the L2-cache is ok...
The FSB is in all cases constant at 33 MHz, only the CPU-frequency-multiplier changed.

No idea, is this a problem of cachecheck only, or of the board itself. Not sure if I should test it any longer (for example, using older BIOS-versions)...

Reply 1539 of 2152, by feipoa

User metadata
Rank l33t++
Rank
l33t++
gonzo wrote on 2022-12-08, 17:30:
... with the PC-Chips M919. . . . […]
Show full quote

... with the PC-Chips M919.
.
.
.

- NO POST with a Voodoo 3 2000 (original 3dfx-manufacturing)

Does your Voodoo3 still work in other motherboards after testing it on your m919? Sounds like a weird question, but I think pshipkov was saying his Voodoo3 died directly after testing it on a m919.

Plan your life wisely, you'll be dead before you know it.