A bit of a strange question, but something I'm wondering about for a project I'm working on. Does the AGTL P6 bus require that the board be set to the FSB of the CPU in order to work at all, or can lower FSBs be used?

For example: Say if you had a dual slot 440BX board, like a P2B-D, and you wanted to run dual Tualatins in it (Provided you had adequate slotkets--Assume Powerleap P3-SMP or iP3/T) without any FSB overclocking on the board. Obviously 100mhz Tualatin Celerons are out of the question as they lack SMP, but if you were to say take dual 1.4g Pentium III-S CPUs, and set the board for a 100mhz FSB, would the Pentium III-S still operate, just at reduced FSB and clockspeed, despite being locked processors? (1400/133= ~10.5, so resulting clock speed would be 1050)