It almost seems like the cpus are actually working in smp a little bit because that second cpu is actually being quiet and letting the first cpu talk on the bus otherwise they wouldn’t be posting….

So, maybe they disabled something about how the cpus actually enable the smp because basically two tillamooks behave exactly how two p55 mmx chips behave when I set the single/dual cpu jumper to [1 cpu]

Now, what do we need in order to figure this out?….

Well, some die shots showing p55 and tillamook gold wires may show wires that weren’t added.

But that’s going to be a disappointment if we find something there.

It doesn’t make the mod impossible if that does end up being it, it just means that it’s beyond the reach of 99.99% of home modders.
I believe there are ways of dissolving the epoxy from the back of the chip and exposing the die and gold wires and pads chemically, but I don’t know for sure..

What I’m hoping for is maybe some way to pull a pin high or low that enables the smp.

How do we figure that out? Maybe a in depth explanation. Of what each smp pin is for and does, and maybe one of those pins will pop out as something that could explain the noted behavior.

It occurs to me that just because all of the pentium mmx cpus look the same on the top, it doesn’t mean that all those capacitors/resistors on top are the same. They could be stealth configuration pads. Just made to “look” the same.

Possible clues in this post:

Re: Tillamook 266MHz and working L2 cache?

lazibayer wrote on 2017-07-28, 15:40:

I did some futile work today. The take home message is: jump wiring BRDY# and BRDYC# pins doesn't solve the problem. […]
Show full quote

I did some futile work today. The take home message is: jump wiring BRDY# and BRDYC# pins doesn't solve the problem.

The longer story. I read the Tillamook's datasheet and found several removed pins comparing to regular pentium:

Screen Shot 2017-07-28 at 11.31.58 AM.png

The top two pins, ADSC# and BRDYC# are related to L2 cache and they are copies of ADS# and BRDY#, respectively. The rest of the pins are related to dual processor setup. Naively I thought it's possible that some boards wire signals to ADSC# and/or BRDYC# instead of ADS# and/or BRDY# and therefore the culprit. ADS# and ADSC# are a little far apart but BRDY# and BRDYC# are next to each other so I bridged the two pin holes with a copper wire. No luck.

I suspect that at least some of those pins that are “supposedly” “not connected” are actually partially working. !!!Lies!!!!…?

Honestly, I am kinda wondering if cpu type or d/p may be the secret to enabling dual tillamooks maybe pulling one high and the other low or both high or low or jumping it from somewhere to somewhere else is all that is needed.

Some more information

Re: Tillamook 266MHz and working L2 cache?

https://www.pchardwarelinks.com/586pin.htm
This has some interesting info..

Diagrams🤔🧐

Here is the standard layout

And here is the Tillamook:

I think what I will do, tell me what you guys think.

Power up a dual p55c setup, and take some voltage readings from the pins in question on both cpus.

Power down and install dual tillamook and take the same readings.

Will these pins react okay to my volt meter reading them on the DC voltage setting?

Will the signal on these pins be on/off voltage or ground or some sort of oscillating signal?

Edit:
Doing some more digging into the schematic.

Using that wonderful link above I have identified all the intel specific pins on the standard diagram and rotated it to match a tillamook pinout and we now can more easily compare the two:[attachment=-1]8AC86827-4AE9-451C-9C44-E5355B504DB2.jpeg[/attachment]

Here is a summary of the notable differences:

These pins are marked as n/c

Here is what they are: or rather are supposed to be.

Cputype
Frcmc#
D/p#
Pbreq#
Pbgnt#
Phitm#
Phit#

Basically, exactly what the prior screenshot from the tillamook datasheet said it would be.
It seems to me though without at least some of these working that two processors would not post on the same bus. So I still am suspicious about exactly, what is going on on these pins that are supposedly “not connected”

So if I measure these pins on a dual p55

And get readings xyz and then do it again on a dual tillamook and get the same xyz readings then that means that whatever is preventing it from working is in the cpu die or cpu package.

But if I get xyz and xuz that may mean that the cpu it’s self is responsible for sending a signal that it isn’t and I may be able to simulate that signal…?

In which case pin mod or mobo mod.

But if the readings are the same, then it’s a cpu mod further in than the pins…

Edit: thanks Deksor, for checking to see if the SMD parts on the topside were all caps or not. Turns out they are caps. 🙁

Thanks for bringing this up.

I haven't looked at the exact operation of tillamook SMP logic yet, but I have a hunch as to what is going on.
I'll be working on my Socket 5/7 adapter again soon so this is something I'll take a look at in detail. The multiplier controls is certainly something that can be exposed.

But for now I suspect, the reason dual tillamook actually works in single chip mode with two CPU's inserted is because the Tillamook CPU buses are tri-state by default until one of the specific Control lines are toggled.
This would mean it uses different SMP logic to P54C and prior, or has some intentionally built in control to prevent SMP operation.

0xCats wrote on 2022-03-03, 11:40:

Thanks for bringing this up. […]
Show full quote

Thanks for bringing this up.

I haven't looked at the exact operation of tillamook SMP logic yet, but I have a hunch as to what is going on.
I'll be working on my Socket 5/7 adapter again soon so this is something I'll take a look at in detail. The multiplier controls is certainly something that can be exposed.

But for now I suspect, the reason dual tillamook actually works in single chip mode with two CPU's inserted is because the Tillamook CPU buses are tri-state by default until one of the specific Control lines are toggled.
This would mean it uses different SMP logic to P54C and prior, or has some intentionally built in control to prevent SMP operation.

So do you think there is a chance that it might be able to be enabled or are my hopes based on something that means nothing?

Btw, you should make a thread for your adapter so we can follow its progress 😀

Will it have built in tillamook, p5a wt/wb, and multiplier mods? As well as cache and dual plane voltage?

Btw, it is already known that the 4x multi is activated by tying the location of the tillamook bf2 pin to the standard bf2 location. Where exactly 4.5x comes into play is unclear.

It seems like people who have been playing with these chips should have found it by now if tying bf2 to the standard bf2 location was the key. Perhaps it’s a matter of pulling it high or low?

I need to get a hold of a socket 7 tillamook 300 to test further.

Edit: I just recalled something,

The golden tigers use the film roll chips, and the golden tiger that cpu galaxy had had a 300mhz setting at 66fsb but when he took it apart it was a tillamook 266.

So I really think a 4.5x exists in this core.

Sphere478 wrote on 2022-03-03, 11:45:

So I really think a 4.5x exists in this core.

400mhz isn’t enough gotta overclock to 450mhz 😀

Also Tillamook was supposed to go to 333mhz but the chips were never released, wonder if a rare engineering sample exists?

rmay635703 wrote on 2022-03-03, 16:53:

Sphere478 wrote on 2022-03-03, 11:45:

So I really think a 4.5x exists in this core.

400mhz isn’t enough gotta overclock to 450mhz 😀

Also Tillamook was supposed to go to 333mhz but the chips were never released, wonder if a rare engineering sample exists?

Yeah I think I recall something about that.

So there may actually be a 5x hidden in there?

I mean it makes sense, it really does. Because the tillamook can do so much higher clocks than it was ever released for.

Did you do any diode mode readings on the nc cpu pins vs a cpu which has those pins c 😁

weedeewee wrote on 2022-03-03, 21:01:

Did you do any diode mode readings on the nc cpu pins vs a cpu which has those pins c 😁

Is it safe? Will it hurt it? My volt meter I think runs 9v through the leads in diode mode….

I haven’t taken any readings yet.

I need input, is it safe or even helpful to read voltage at those pins on a live system?

9v in diode mode, are you sure? that should definitly light up a white led. most multimeters only do 1v5 maybe 2v in diode mode readings.

and you don't do diode mode measurements on a live system.

weedeewee wrote on 2022-03-03, 22:27:

9v in diode mode, are you sure? that should definitly light up a white led. most multimeters only do 1v5 maybe 2v in diode mode readings.

and you don't do diode mode measurements on a live system.

well. the good ones can read microwave diodes and use 9v

okay, what does this mean? as you can see my testing got cut short.

I think sometimes these readings are changing like I just read the 1.65v reading again and it's near 0v

I also need to identify which pin changes value when the cpu jumper is set

more I look at this, the more I think that these pins really are not attached at all. the readings of tillamook vs no cpu are way too similar...

I am now taking measurements directly from the cpu

cputyp is proving interesting

I have 1mohm to ground on the p55c but totally open on the tillamook

edit:
yeah crap. I think I've confirmed something and it's exactly what we didn't want. pretty sure this means we're screwed for dual tillamook

btw all these tests have been on a black plastic pin grid 266

next I will check to see what the story is on a damaged 233 tillamook green pcb type that I have

Edit2:
damn, same readings on the green pcb tillamook.

guys I think we've killed almost all hope for this the only chance I see is golden tiger... and I don't have one to test. anyone have a line on the cpu galaxy guy?

okay, sad to say the dual tillamook idea is pretty much dead. :'( sparing some sort of discovery of a package/die mod which seems quite unlikely. it may simply be that the silicon it's self never did support it

catsay, this rules out redundant tillamooks right?, as well as smp tillamooks I assume?

next order of business,

4.5x and 5x multiplier!?

what do we know, how can we test?

bonus points: also, any other socket 5/7 cpus that may be hiding something? I can't think of any.... other than discovering how, and unlocking multiplier locks on pentium chips.

Sphere478 wrote on 2022-03-04, 01:40:

anyone have a line on the cpu galaxy guy?

https://www.cpu-galaxy.at/Info/contact.htm