havli wrote on 2022-03-30, 16:42:

Thanks for the effort - tested now, but it seems to have problem communicating with the ICS. The log file is attached.

dump2.txt

Crap, that means I need to fix the SMBus address detection code. Unfortunately there are zero references online besides the VIA and PLL datasheets, so all my code is written using basically trial and error. It's a miracle it works at all! Le me see what I can do...

havli wrote on 2022-03-30, 16:42:

Thanks for the effort - tested now, but it seems to have problem communicating with the ICS. The log file is attached.

dump2.txt

Can you please try something for me? Run CPU-Z. Click on Tools > Save Report as .TXT. Open the CPU-Z report in a text editor. Right at the bottom, you should see something like this:

1Register Spaces
2------------------------------------------------------------
3...
4Register Space                 SMBus, base address = 0x05000

Can you tell me what your SMBus base address is? Thanks!

enaiel wrote on 2022-03-30, 21:28:

Can you please try something for me? Run CPU-Z. Click on Tools > Save Report as .TXT. Open the CPU-Z report in a text editor. Right at the bottom, you should see something like this:

Sure, no problem, here it is:

1Register Spaces
2-------------------------------------------------------------------------
3
4Register space			PCI
5Register space			PCI #2
6Register space			SMBus, base address = 0x0500

The whole report, just in case

Released version 0.1.8. Fixed SMBus address detection. Also by default will now restrict FSB frequencies to only those with the current PCI divider to minimize crashes. Use the new UNSAFE MODE command parameter (-u) to override this behavior.

I consider VIAFSB to be functionally complete now. All my theories on crossing PCI dividers have come to naught 🙁. I will of course continue bug fixing, refactoring, and adding support for any new PLLs that are requested.

havli wrote on 2022-03-31, 14:58:

Sure, no problem, here it is: […]
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Sure, no problem, here it is:

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1Register Spaces
2-------------------------------------------------------------------------
3
4Register space			PCI
5Register space			PCI #2
6Register space			SMBus, base address = 0x0500

The whole report, just in case
F9S1Y4.txt

Should be fixed in latest VIAFSB version. Thanks for testing!

Looking around today and found I had two MVP3 boards. Coincidentally they both had the exact same clock generator: ICS ICS9148BF - 37. I haven’t powered them up yet but one of them at least should work for some testing. Believe this is the data sheet although it’s missing the “BF”

Edit: the two VIA MVP3 Super Socket S7 boards are:
HOT-591P version 3.1
And
Tyan S1598 Trinity

Zeerex wrote on 2022-04-01, 00:46:

Looking around today and found I had two MVP3 boards. Coincidentally they both had the exact same clock generator: ICS ICS9148BF - 37. I haven’t powered them up yet but one of them at least should work for some testing. Believe this is the data sheet although it’s missing the “BF”

Sure, will add support for this PLL. Just refactoring my code to make it easier to add support for new PLLs.

enaiel wrote on 2022-03-31, 19:20:

Should be fixed in latest VIAFSB version. Thanks for testing!

It definitely is a step in the right direction. Now my board actually reacts to the FSB change... unfortunately with a freeze and artifacts on the screen. 😁
Perhaps it just doesn't like any manipulation with the frequency. Also I am using the IGP, so that might be another source of problems.

Anyway - here is log from the latest version. If you can spot something in there.

Released version 0.1.9. Did some major refactoring to make it easier to add support for new PLLs. Added initial support for PLL ICS9148-37. Made minor changes to PLL ICS950908.

Zeerex wrote on 2022-04-01, 00:46:

Looking around today and found I had two MVP3 boards. Coincidentally they both had the exact same clock generator: ICS ICS9148BF - 37. I haven’t powered them up yet but one of them at least should work for some testing. Believe this is the data sheet although it’s missing the “BF”

Added initial support for the PLL. Please download the latest version and let me know if it works.

havli wrote on 2022-04-01, 18:36:

It definitely is a step in the right direction. Now my board actually reacts to the FSB change... unfortunately with a freeze an […]
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It definitely is a step in the right direction. Now my board actually reacts to the FSB change... unfortunately with a freeze and artifacts on the screen. 😁
Perhaps it just doesn't like any manipulation with the frequency. Also I am using the IGP, so that might be another source of problems.

Anyway - here is log from the latest version. If you can spot something in there.
dump3.txt

We're able to actually communicate with the PLL now and get back the FSB, so that's much better. Made some minor changes to the last few bytes we're sending based on default values from the datasheet. If that doesn't work, then I'm officially out of ideas as everything looks exactly like in the datasheet.
Please try to set the FSB to 130 first, and if that works, then try 111.

Thanks for testing!

Sure I finally get around to testing and the 1st board I grab is a weirdo.

Winbond w83194br-39b https://datasheetspdf.com/pdf-file/370400/Win … /W83194BR-39B/1

edit: 2nd board I grab isnt any better Winbond w83195r-08 https://datasheetspdf.com/pdf-file/370424/Win … nd/W83195R-08/1

Confirmed working on PcPartner AP133AAS3-T205C <OEM version> (Apollo 694T - PGA370) with ICS94211

Tried to use it on my Chaintech 6AIA2. Unfortunately it doesn't support it, as my PLL is something not supported yet.
I think i have this: W124G - https://www.datasheets360.com/pdf/-4213003440200208478

Maybe it would be easy to add support for this? 😀

Tested with ICS9148BF - 37, on the Tyan board, unfortunately it did not work. When using GET it appears to detect a 60Mhz clock when 100Mhz is set. I wonder if the datasheet missing the BF is the issue. Logs attached in zip file: GET operation, set operation to 60, and set operation to 83.30 using the -u unsafe mode (which freezes up the PC when ran without -d).

Released version 0.2.0 with initial support for PLLs W124, W83194BR-39B, W831915R-08. Also, made a minor fix for PLL ICS9148-37.

Grem Five wrote on 2022-04-02, 15:28:

Sure I finally get around to testing and the 1st board I grab is a weirdo.

Winbond w83194br-39b https://datasheetspdf.com/pdf-file/370400/Win … /W83194BR-39B/1

edit: 2nd board I grab isnt any better Winbond w83195r-08 https://datasheetspdf.com/pdf-file/370424/Win … nd/W83195R-08/1

No problem, added initial support for both PLLs in latest version. Please test and let me know.

Grem Five wrote on 2022-04-02, 16:08:

Confirmed working on PcPartner AP133AAS3-T205C <OEM version> (Apollo 694T - PGA370) with ICS94211

Awesome! Added to confirmed tested motherboards. Thanks!

GigAHerZ wrote on 2022-04-02, 16:34:

Tried to use it on my Chaintech 6AIA2. Unfortunately it doesn't support it, as my PLL is something not supported yet.
I think i have this: W124G - https://www.datasheets360.com/pdf/-4213003440200208478

Maybe it would be easy to add support for this? 😀

Yes, added support in latest version. Just keep in mind that it's also write-only, means you cannot get the current FSB, you can only set it.

Zeerex wrote on 2022-04-02, 22:46:

Tested with ICS9148BF - 37, on the Tyan board, unfortunately it did not work. When using GET it appears to detect a 60Mhz clock when 100Mhz is set. I wonder if the datasheet missing the BF is the issue. Logs attached in zip file: GET operation, set operation to 60, and set operation to 83.30 using the -u unsafe mode (which freezes up the PC when ran without -d).

The datasheet missing the BF could be the issue. It could also be that this PLL does not support reading the latched FSB values, so could you try setting the FSB in the BIOS, and then trying a GET?
Regarding the SET, it did have a bug where I was writing 5 bytes instead of 6. Can you try the SET again, with and without the unsafe option?

Thanks for testing!

enaiel wrote on 2022-04-04, 16:52:

Released version 0.2.0 with initial support for PLLs W124, W83194BR-39B, W831915R-08. Also, made a minor fix for PLL ICS9148-37.

GigAHerZ wrote on 2022-04-02, 16:34:

Tried to use it on my Chaintech 6AIA2. Unfortunately it doesn't support it, as my PLL is something not supported yet.
I think i have this: W124G - https://www.datasheets360.com/pdf/-4213003440200208478

Maybe it would be easy to add support for this? 😀

Yes, added support in latest version. Just keep in mind that it's also write-only, means you cannot get the current FSB, you can only set it.

Amazing, thanks!

Tried it out, but unfortunately it just locks the computer up. So much so, that i have to do actual shutdown-poweron cycle - reset wouldn't make it.

I tried setting fsb to 75MHz. I know that when i overclock from bios, i can easily do 83MHz FSB with my setup.
If there's any information i could provide in addition, let me know.

GigAHerZ wrote on 2022-04-04, 17:48:

Amazing, thanks! […]
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Amazing, thanks!

Tried it out, but unfortunately it just locks the computer up. So much so, that i have to do actual shutdown-poweron cycle - reset wouldn't make it.

I tried setting fsb to 75MHz. I know that when i overclock from bios, i can easily do 83MHz FSB with my setup.
If there's any information i could provide in addition, let me know.

Hmm, I just double checked the datasheet and my code and couldn't find any differences. Can you try running the SET with the dump command?

VIAFSB w124 75 -d > dump.txt

The dump command will not crash because it just does a dry run of the SET command.

Also, can you try running the GET with a different PLL - it should crash the computer since the PLL is write-only, but I just want to verify it.

VIAFSB ics94211 -d > dump2.txt

If you can provide me these two dumps, I can have another look. Thanks!

Here it is.
Getting the fsb as you suggested, did lock up the machine and the dump file is empty.

Uploaded the dump of trying to set fsb to 75 with correct pll.
Hope it helps, let me know, if i can add anything.

GigAHerZ wrote on 2022-04-04, 18:29:

Here it is. Getting the fsb as you suggested, did lock up the machine and the dump file is empty. […]
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Here it is.
Getting the fsb as you suggested, did lock up the machine and the dump file is empty.

Uploaded the dump of trying to set fsb to 75 with correct pll.
Hope it helps, let me know, if i can add anything.

Maybe there is someone on Vogons who can figure out what I'm doing wrong?

Here's the PLL W124 datasheet: https://www.datasheets360.com/pdf/-4213003440200208478

Here's what I'm writing to the PLL:
W124: Writing FSB_BYTE(3) (hex bin): 18 00011000
W124: Writing 7 bytes (hex): 00 00 00 18 45 EF 23

Based on the datasheet:

• The PLL is write-only
• Need to write 7 data bytes
• First 3 data bytes are ignored
• The 3rd data byte (starting from 0) is the FSB_BYTE
• In the FSB_BYTE, Bit 3 (starting from 0) is the FS_SEL bit, needs to set indicating that the FSB is being set by software.
• In the FSB_BYTE, Bits 4, 5, 6 need to be set as (0 0 1) to set the FSB to 75 as per the FSB frequency table in the datasheet.

The other possibility is maybe that W124G is actually different from W124? Can you try using SetFSB, SoftFSB, or CPUFSB in Windows and see if they support it? They may provide some additional information.

No dice still for ICS9148BF-37, results attached for SET safe and unsafe. I'll keep searching in cyberspace for the correct datasheet with the 'BF' in the meantime.

I have not had any luck with the winbond machines

[*] DFI CA63-SN W83194BR-39B

As you can see from pics viafsb isnt showing right FSB just loading the pll

[*] Asus P3V 4X W83195R-08

I noticed on this one it says Detected VT82C596A southbridge when its actually a VT82C596B I dont know if that has anything to do with the error or not.

Grem Five wrote on 2022-04-06, 02:08:

I have not had any luck with the winbond machines

As you can see from pics viafsb isnt showing right FSB just loading the pll

I noticed on this one it says Detected VT82C596A southbridge when its actually a VT82C596B I dont know if that has anything to do with the error or not.

Can you please run VIAFSB with the dump option?

VIAFSB [pll_name] [fsb_freq] -d > dump.txt

The dump file will tell me what it's actually reading. Thanks for testing!