VOGONS


Reply 220 of 385, by jheronimus

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douglar wrote on 2021-04-27, 18:41:
I'd like to copy the roms and put the document here if that's OK: http://vogonsdrivers.com/index.php?catid=77&menustate=32,29 […]
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jheronimus wrote on 2021-04-09, 21:26:

So I did a thing where I've cross referenced most of the known MR BIOS files with official documentation and made a list of everything. There are around 500 files, but many of those are different versions of the same BIOS (especially when it comes to Intel/Asus motherboards).

I'd like to copy the roms and put the document here if that's OK: http://vogonsdrivers.com/index.php?catid=77&menustate=32,29

Any idea what the differences between these ROMS are?
OPTi 82C391 - 386 WriteBack x020B324 (T-)
OPTi 82C391 - 386 WriteBack x020B324 (T+)
OPTi 82C391 - 386 WriteBack x020B324 (CL-)
OPTi 82C391 - 386 WriteBack x020B324 (CL+)

Can't help you with T-/T+ thing, it was not explained in the docs, unfortunately.

I think you should add my Google Docs table as a download and not a link.

MR BIOS catalog
Unicore catalog

Reply 221 of 385, by douglar

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jheronimus wrote on 2021-04-29, 20:42:

Can't help you with T-/T+ thing, it was not explained in the docs, unfortunately.

I think you should add my Google Docs table as a download and not a link.

GigAHerZ put a link to a pretty good link that offers an explanation of the different version. (T) Turbo Switch, (TL) Turbo Light (CL) Cache Light

I put the file names in the file description. That's about the best I was able to do tonight.

Reply 223 of 385, by Anonymous Coward

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Woah. There are motherboards with headers for cache lights? Where can I get one of those?

"Will the highways on the internets become more few?" -Gee Dubya
V'Ger XT|Upgraded AT|Ultimate 386|Super VL/EISA 486|SMP VL/EISA Pentium

Reply 224 of 385, by jheronimus

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Did a bit of an update. Added around 40 new BIOS files. Most are just different versions for Triton-based motherboards (versions 3.19-3.31).

What's more important is I've rearranged the whole structure of the archive. Now almost all folders are called by MR BIOS part names (e.g. V097B50D) and are sorted by versions (different versions of the same BIOS share the same part name, as they do in MR BIOS docs). This allows to crossreference partnames with different motherboards they support — I've already identified a couple of images that way.

Naturally, I'm not sure how to match most user dumps with part names yet and I don't know the version number for some of them (they are now in the "TBD" sheet in my Google Docs).

jheronimus wrote on 2021-04-09, 21:26:

Here's the list, everybody can comment on the table.

Here are all the files.

MR BIOS catalog
Unicore catalog

Reply 225 of 385, by douglar

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jheronimus wrote on 2021-05-01, 02:14:

Did a bit of an update. Added around 40 new BIOS files. Most are just different versions for Triton-based motherboards (versions 3.19-3.31).

Nice stuff. Splitting it up by CPU makes things easier to find.

The “alaris cougar” mobo is a 486dx board with a blue lightning cpu soldiered on.

Reply 226 of 385, by dataino.it

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Found in this unknown mobo for the moment

....... Soyo SY-015G ?
https://www.ultimateretro.net/en/motherboards/4655

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Last edited by dataino.it on 2021-11-27, 10:24. Edited 1 time in total.

Reply 231 of 385, by dataino.it

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dataino.it wrote on 2021-05-09, 15:28:

I can't find post code and beep code of MrBios exist a table ?

i have sometime 4 beep orhang to "1D" in a MrBios mobo

https://www.hzdr.de/FWR/VB/BIOS/mrpost.htm

00 Kaltstart, Ausgabe des EDX Registers zu den I/O ports 85h, 86h, 8Dh, 8Eh für den späteren Gebrauch
01 Initialisierung und Anpassung des KBD Controllers, ausschalten des CPU Cache, Intitialisierung des Onboard I/O chipset, Größe und Test des RAM, Größe des Cache
02 Einschalten(Monitor, DMA, FDC, I/O Ports, Lautsprecher, NMI)
03 CMOS-Checksumme des BIOS ROM berechnet
04 Test des Seitenregisters
05 Einschalten des A20 Gate, Ausgabe des 8042 Selbsttests
06 Initialisierung ISA I/O
07 Warmstart und Anpassung des KBD Controllers, Initialisierung des Onboard I/O Chipsets.
08 Refresh toggle test
09 Test des DMA Masterregisters, Test DMA Slaveregisters.
0A Basisspeicher 64k wird initialisiert
0B Test Master 8259 mask, test Slave 8259 mask
0C Test 8259 Slave, test 8259 slave's interrupt range, initialize interrupt vectors 00 - 77h, init KBD buffer variables.
0D Test des Timers 0, 8254 channel 0
0E Test 8254 Ch2, Lautsprecherkanalspeaker channel
0F Test RTC, CMOS RAM read/write test
10 Turn on Monitor, Show any possible error messages
11 Read and checksum the CMOS
12 Call Video ROM initialization routines, Show Display signon message, Show ESC Delay message
13 Set 8MHz AT-Bus
14 Size and test the base memory, Stuck NMI check
15 No KB and PowerOn: Retry KB init
16 Size and test CPU Cache
17 Test A20 OFF and ON states
18 Size and test External memory, Stuck NMI check
19 Size and test System memory, Stuck NMI check
1A Test RTC Time
1B Determine Serial Ports
1C Determine Parallel Ports
1D Initialize Numeric Coprocessor
1E Determine Floppy Diskette Controllers
1F Determine IDE Controllers
20 Display CMOS configuration changes
21 Clear screens
22 Set/reset Numlock LED, perform Security functions
23 Final determination of onboard Serial/Parallel ports
24 Set KB Typematic Rate
25 Initialize Floppy Controller
26 Initialize ATA discs
27 Set the video mode for primary adaptor
28 Cyrix WB-CPU support, Green PC: purge 8259 slave, relieve any trapped IRRs before enabling PwrMgmt, set 8042 pins, Ctrl-Alt-Del possible now, Enable CPU Features
29 Reset A20 to OFF, install Adapter ROMs
2A Clear Primary Screen, Convert RTC to system ticks, Set final DOS timer variables
2B Enable NMI and latch.
2C Reserved
2D Reserved
2E Fast A20: Fix A20
2F Purge 8259 slave; relieve any trapped IRRs before enabling Green-PC. Pass control to INT 19 boot
32 Test CPU Burst
33 Reserved
34 Determine 8042, Set 8042 Warm-Boot flag STS.2
35 Test HMA Wrap, Verify A20 enabled via F000:10 HMA
36 Reserved
37 Validate CPU: CPU Step NZ, CPUID Check. Disable CPU features
38 Set 8042 pins (Hi-Speed, Cache-off)
39 PCI Bus: Load PCI; Processor Vector init'd, BIOS Vector init'd, OEM Vector init'd
3A Scan PCI Bus
3B Initialize PCI Bus with intermediate defaults
3C Initialize PCI OEM with intermediate defaults, OEM bridge
3D PCI Bus or PLUGnPLAY: Initialize AT Slotmap from AT-Bus CDE usage
3E Find phantom CDE ROM PCI-cards
3F PCI Bus: final Fast-Back-to-Back state
40 OEM POST Initialization, Hook Audio
41 Allocate I/O on PCI-Bus, logs-in PCI-IDE
42 Hook PCI-ATA chips
43 Allocate IRQs on the PCI Bus
44 Allocate/enable PCI Memory/ROM space
45 Determine PS/2 Mouse
46 Map IRQs to PCI Bus per user cmos, Enable ATA IRQs.
47 PCI-ROM install, note user cmos
48 If Setup conditions: execute setup utility
49 Test F000 Shadow integrity, Transfer EPROM to Shadow-RAM
4A Hook VL ATA Chip
4B Identify and spin-up all drives
4C Detect Secondary IRQ, if VL/AT-Bus IDE exists but its IRQ not known yet, then autodetect it
4D Detect/log 32-bit I/O ATA devices
4E Atapi drive M/S bitmap to Shadow-RAM, Set INT13 Vector
4F Finalize Shadow-RAM variables
50 Chain INT 13
51 Load PnP, Processor Vector init'd, BIOS Vector init'd, OEM Vector init'd
52 Scan PLUGnPLAY, update PnP Device Count
53 Supplement IRQ usage -- AT IRQs
54 Conditionally assign everything PnP wants
58 Perform OEM Custom boot sequence just prior to INT 19 boot
59 Return from OEM custom boot sequence. Pass control to 1NT 19 boot
5A Display MR BIOS logo
88 Dead motherboard and/or CPU and/or BIOS ROM.
FF BIOS POST Finished.

Reply 232 of 385, by Riikcakirds

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I've gone through this thread and the mr-bios user manual (133 pages) for v3.30, can't find what the maximum Hard drive limits supported are. Does mr-bios support drives > 128GB in the latest version (I believe version 3.46 the latest?).

Reply 233 of 385, by douglar

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Riikcakirds wrote on 2021-05-17, 17:58:

I've gone through this thread and the mr-bios user manual (133 pages) for v3.30, can't find what the maximum Hard drive limits supported are. Does mr-bios support drives > 128GB in the latest version (I believe version 3.46 the latest?).

MrBios 3.30 came out in in the 1996-1997 time frame,
MrBios 3.46 came out in in the 1998-1999 time frame,
Seems very unlikely it supported the 2001 standard.

528 MB limit - BIOS before July 1994 rarely support drives over 528MB. They were limited to Cylinders <= 1024, Heads <= 16, Sectors/Track <= 63
2015 MB limit - BIOS before May 1996 rarely support drives larger than 2015 MB. They were limited to Cylinders <= 4095, Heads <= 16, Sectors/Track <= 63
4.2 GB limit - Some BIOS before February 1997 have the first ECHS (Extended CHS) limit. DOS and Windows 95/98 cannot handle 256 heads. 'Large' mode in the BIOS produces an alternate geometry by doubling the number of heads and halving the number of cylinders shown to DOS until cylinders <= 1024. The limit for this method is 4032 MB (C=1024, H = 128, S = 63) for drives that report 16 heads.
7.9 GB limit - Some BIOS before February 1997 had a Revised ECHS limit. 'Large' mode in the BIOS presents an alternate geometry using multiples of 15 heads, up to 240 heads. This method stops working at 7560 MB (C=1024, H=240, S=63)
8.4 GB limit - Some BIOS before February 1997 has the final ECHS limit - Bios geometry selects head head value from the sequence 16, 32, 64, 128, 255 to present an alternate geometry up to (C=1024, H=255, S=63). Hard drives larger than 8.4GB report a geometry of C=16383,H=16,S=63 to indicate that they are larger than can be described using ECHS geometry translation)
33.8 GB limit - Many BIOS before August 1999 stored the cylinders as a 16 bit value, so they could not process cylinders > 65535.
137.4 GB limit - BIOS before September 2001 only used ATA-5, which used 28 bits to identify each LBA sector, limiting drive capacity to 137GB. ATA-6 added an additional 48bit LBA sector field. Hard drives over 137.4 GB should report an LBA capacity of 0xfffffff sectors and report the actual value in the 48-bit field.

Reply 234 of 385, by GL1zdA

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Were there any MR-BIOS releases for motherboards newer than Socket 7? Or did it just end with Intel Triton boards? Did they support any other chipsets for the Pentium? I can see ony OPTi chipset, but nothing else.

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Reply 235 of 385, by evasive

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They were taken over by eSupport/UniCore somewhere between sept 25, 2001 and november 30, 2001

Unicore was the patching/upgrade service from Award/Phoenix. So they swiftly killed off their only competitor after that.

Reply 236 of 385, by Eep386

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Just a quick report - the MR BIOS image for the Octek Jaguar V seems to work on my C386MX board with an MX305/306 chipset. And it works vastly better than the AMI BIOS it replaced.
Using the stock 386DX-40 CPU, no FPU. Don't have a 486DLC to test.

Life isn't long enough to re-enable every hidden option in every BIOS on every board... 🙁

Reply 237 of 385, by Am386DX-40

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Eep386 wrote on 2021-06-30, 18:31:

Just a quick report - the MR BIOS image for the Octek Jaguar V seems to work on my C386MX board with an MX305/306 chipset. And it works vastly better than the AMI BIOS it replaced.
Using the stock 386DX-40 CPU, no FPU. Don't have a 486DLC to test.

Nice! It's a cool board. I have it with the stock bios, need to get some eeproms to upgrade it.

Reply 238 of 385, by SWZSSR

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Looking for Mr.Bios to suit my Micronics 80386 ASIC cache (09-00050-xx)

Tried one of the micronics ones that seemed
Like the best fit but no post.. I did place the mr.bios on the hi rom?

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Reply 239 of 385, by Anonymous Coward

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You probably need to split the image into HI and LO for it to work...does your board have any jumpers for changing the ROM size to 512kbit?

"Will the highways on the internets become more few?" -Gee Dubya
V'Ger XT|Upgraded AT|Ultimate 386|Super VL/EISA 486|SMP VL/EISA Pentium