Accessing CR2/CR3 at CPL 1,2,3? \ VOGONS

Accessing CR2/CR3 at CPL 1,2,3?

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First post, by superfury

Posted on 2018-10-11, 12:22

superfury Offline

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Reading the 80486 manual, it lists the following control instructions as priveleged(CPL0 only, any other CPL levels(1,2,3) are illegal):
- CLTS
- HLT
- LGDT
- LIDT
- LLDT
- LMSW
- LTR
- MOV to/from CR0
- MOV to/from DRn
- MOV to/from TRn

Does that mean that MOV to/from CR2/CR3 is allowed always(CR1 being #UD always)? Or is that a documentation error?

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Reply 1 of 1, by Stenzek

Posted on 2018-10-13, 04:17

Stenzek Offline

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Posts: 64
Joined: 2017-12-08, 08:30

From the Pentium manual:
- PMode: #GP(0) if CPL != 0 for all control registers, #GP(0) if writing to reserved bits of CR4
- Real Mode: Interrupt 13 (which is #GP) if writing to reserved bits of CR4
- V8086 Mode: #GP(0) unconditionally

Which makes sense, you wouldn't want userspace to be able to change the page directory address, as that would render the protection useless.

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