sliderider wrote:The fastest I have ever seen in any quantity is the 366. 400 shows up for sale once in a rare while but the 433 seems to be practically non-existent. I've seen Engineering Samples of other chips with larger production runs than the MII 433. I have yet to see one being sold anywhere. I think your best odds for getting one of the faster ones is to find a Cyrix based system for sale where the seller knows the CPU is a Cyrix but is unaware of what model it actually is. I found a guy on another vintage computing forum a while back who acquired an AMD K5 system and it turned out to be a PR200, so there are probably still a few of those hidden gems out there.
Yes,it seems VIA only briefly continued manufacturing of those faster grades. (though the 2.2V versions of the 366 seem a bit more common, but still rather rare -not to mention the mobile chips)
The 2.9V 366 (100x2.5) seems to be quite common though, at least given the number I've seen pass through ebay recently. (and the number of references I've seen online -it seems emachines used quite a lot of them)
DO you know if all the 2.2V parts are 180 nm, or are some 250 nm too? (I can't seem to find solid info on the 250 nm parts, but it would seem a bit odd to continue the 2.9V of the 350 nm chips on the newer process -AMD and Intel weren't doing that, and in the extreme cases they usually topped at 2.4V for some early release up-clocked versions)
feipoa wrote:
For more on the ALi vs. MVP3 topic, you can refer to this recent thread, Re: Super Socket 7: VIA MVP3 vs. ALi Aladdin V
After my experience with the ASUS ALi Aladdin V and Cyrix MII combination, I'm a bit soured on ALi boards and am wondering if any ALi board properly supports the MII (see above link). I'm also stearing clear of the VA-503+, but have high hopes for his ATX big brother, the PA-2013. I am not at all surprised that your VA-503+ died. I've not tested a GA-5AA or GA-5AX (ALi) and am a little reluctant to source one given my bad experience with ASUS/ALi. This is a decent website to begin hunting for a S7/SS7 board, http://web.inter.nl.net/hcc/J.Steunebrink/k6plus.htm
I'm honestly not really sure what happened with the 503+ we had, but by my dad's recollection (who built the system) it did fail and got replaced by the 503A. (not sure how long it lasted before that though, but it was running a K6-2 300 at the time)
If my old board is anything to go by, the 503A is pretty reliable, but a sampling of 1 doesn't mean much statistically. 😉 (and as you say, there are other good MVP3 options)
Does Weirdstuff Warehouse have any decent PCI socket 3 boards? That's where the money's at these days. SS7 needs another 5-10 years.
I didn't get a change to check the back warehouse section (with the less organized bulk storage), but the main area didn't have much in the way of 486 stuff (though it did have some odd single-board computer designs without normal expansion slots). Not much socket 7 stuff in general beyond that FIC-503 on that particular day at least (there was an odd single board computer card with a P200 classic though).
There was 1 socket 8 board and a lot of, Slot 1, 370, and Socket A stuff.
But yeah, nothing really interesting beyond that, at least at the time. (their website doesn't catalog any of the warehouse stuff either -just has listings for current online auctions and such, so that's not a great resource either)
It varies a lot though and a lot of stuff passes through there, so it's hard to say. (I have a friend who goes there more often, but that's the first time I'd gone there in a long time -just started getting into the retro computer stuff more seriously a year or so ago, and my dad kept a ton of our old hardware so there hasn't been that much need to look elsewhere -though it's certainly fun to just poke around at all the stuff they had there 😉)
I sorta doubt it. That's a lot of voltage to drop for not changing the fab process. The fastest marked MII at 2.9V seems to be the engineering sample MII-350 at 90*3 (270 MHz). Do you have a photo of a 2.9V piece marked for 83*3.5 (292 MHz)? Since there were MII-366GP's marked as 2.2V, it would seem highly irregular to continue downmarking the voltages on even later chips (MII-400GP). I have an MII-366GP marked as 2.2V, but unfortunately it was DOA. I do have two working MII-400GP's though. The MII-366GP 2.9V chip I have does not overclock well at all; 300 MHz was definately out of the question when I tested it.
OK, I was probably mistaken on that assumtion of the 2.9V 292 MHz model. (I can't seem to find any references to that -and rather little even on the 2.2V version)
It looks like the fastest 2.9 MII in volume production was the 75x3.5 333 at 262.5 MHz.
Back onto the question of the MII-400GP. I am still puzzled by its 95 MHz FSB. I wonder if the limiting factor was not in running the chip at 300 MHz, but rather the gain-bandwidth product of the onboard PLL frequency multiplier? From my tests with 486 boards, the input clock signal can sometimes have a rather poor swing, not even reaching TTL levels, so I figured that, in addtion to multiplying the frequency, the CPU also did some amplification and comparison to bring the CPU clock to digital TTL levels. It could be that the PLL/amplifier combination used on the MII-400GP wasn't up to stuff inasmuch as the gain-bandwidth product is concerned (among other things). An interesting test would be to try running the chip at 83x4 (333 MHz) vs. 112x3 (336 MHz). Provided that the motherboard is proven stable enough at 112 MHz (on say an AMD K6-2 CPU), if 112 fails on the MII, but passes on the 83, the issue is likely related to the CPU's ability to multiply/condition higher frequency buses.
AMD had similar problems with the early model K6-2 300, right? (having to down-bin some of those to 66x4.5 rather than 100x3)
Though the 95 MHz bus is a rare example of that. (95 MHz bus chips -in as far as the K6-2- were clocked as such due to core speed/yield limits rather than multiplier issues)
And in such a case (limited bus freq tolerance, but adequate core speed tolerance), you'd also think Cyrix would have commonly offered 66x4.5, 75x4, and 83x3.5 MHz parts at the same time. (which doesn't seem to be the case at all)
On a similar note, I'd assume those potential bus speed/multiplier related issues would also have been a limiting factor on Cyrix not getting a 100 MHz bus part out sooner than they did. (ie no 100x2 MHz part -which could have been very significant in early/mid 1998)
I wonder if any of the older (non 100 MHz) 6x86s/MIIs will actually well at 100 MHz bus. (and multipliers to match similar or lower clock rates to their rated speed -so avoiding heat/core stability problems)
Thank you for bringing Real World Tech to our attention. I've read their Cyrix 6x86MX links.
"the 6x86MX is not specifically optimized for Windows NT. It is optimized for both 16-bit and 32-bit code that is primarily found in Windows 95"
Strange, I thought Cyrix CPUs were targeting the business application world, which is where NT was used mostly. Maybe that targeting wasn't until the MX's. Real World Tech also seems to recommend SiS chipsetted boards for the Cyrix 6x86MX (perhaps because SS7's weren't out yet when the article was written?). It was interesting to read that Cyrix revision 2.6 and earlier CPUs had some bug issues with NT4.0 which Cyrix could not replicate in the lab. I wonder if the NT service packs ever fixed this?
I'd gotten more of an impression that Cyrix generally targeted mainstream integer performance for general desktop home/business computing, and the "for business" connotation was applied more after the fact due to games/multimedia stuff shifting to a heavy pentium/FPU bias toward the end of the 90s (the K6's stronger FPU and later 3DNow! solidified that further).
Plus, even if they HAD optimized the MX for WinNT/OS/2 style software, they'd still be building onto the excellent 16-bit integer performance of the M1 core. (so have inherently better balanced 16/32-bit performance than the P6 designs)
And on the games/multimedia issue, prior to Quake, the 6x86 should have been among the very top performing CPUs for games/multimedia in general (due to the greater emphasis on 486 coding -or even 386/486SX compatibility- ) and when Quake did arrive it was still one of only a very few pentium-specific mainstream applications available at the time. (though that pentium and/or floating-point bias grew and AMD's newer chips catered much better to that -and added 3DNow!- while Cyrix started to lag in general around that time -apparently in large part due to National Semiconductor's management decisions to de-emphasize development of high performance dektop CPUs in favor of focusing on embedded SoC type designs -stemming from the Media GX)
This was interesting to read as well, "...their (SGS Thomson) manufacturing process was so poor that Cyrix themselves didn't even buy the 6x86s that came off their fab lines." So it seems like the IBM branded pieces were the best, followed by Cyrix, then SGS.
Cyrix and IBM chips should have generally come from similar IBM facilities, with the main difference being packaging and IBM's more stringent quality control for speed rating. (and sometimes slightly lower retail pricing than Cyrix, oddly enough -at least according to that faq)
Another interesting bit, "The Cyrix supplied heatsink/fan rotates three times faster than most standard heatsink/fans to help reduce heat." Some said it sounds like a jet engine. I've never had an official Cyrix S7 heatsink/fan. Perhaps they were sold to the end-users?
According to that site, Cyrix later stopped packaging CPUs with fans, but instead included documentation of the requirements/specifications of the fans to be used.
My main interest with Cyrix started with the 5x86, because on the socket 3 platform, Cyrix was King if you could configure your system properly. There are a few IBM 5x86c CPUs out there which apparently work ok at 150 MHz. The few I have will only work at 133 MHz reliably, but I have a few coming in that I'm hopeful for. This post has a Speedsys Image of one such Cyrix 5x86-150, though the board used there didn't have its memory optimised.
At 133 MHz, a 5x86 would probably even be significantly faster than a Pentium overdrive of AM5x86 at 160 MHz (barring the unreliable 4x50 MHz overclock).
Hell, even for Quake it might have been better than an 83 MHz overdrive. (the Cyrix FPU would be running at 133 MHz after all -was the 5x86 FPU similar performing to the 6x86?)
Let alone a 150 MHz (50 MHz bus) 5x86. (though that would probably be about as hard to achieve as on an AM5x86 -or tougher given the touchier nature of the 5x86 -as you say, limited to very specific revisions)
I kind of wonder how well the 5x86 core would have done as a socket 5/7 part. The per-clock ALU performance was obviously worse, but the yields seemed to be considerably higher than 6x86 parts of the same time (given the high clock speeds) and die size also was much smaller. (so cheaper too -and cooler running, at least at similar clock rates)
If nothing else, it probably would have been a great entry level part to complement the higher end 6x86/MII (more like the Winchip -except considerably better performing, especially assuming all the bugs were fixed and those added features were enabled).
In hindsight at least, that probably would have been a much better investment than moving the 5x86 onto the Media GX project. (not to mention the fateful impact of National Semiconductor taking interest in the company because of that design)
Quake seemed to be heavily optimised for the Pentiums, as you pointed out. I enjoyed the read on the FPU; if Cyrix was somewhat resource strapped, I think they did the right thing to focus on ALU applications given this statement, "One reason Cyrix did this is because the most commonly used games and applications in Windows don't use FPU. These applications depend on integer operations."
Yes, prior to Quake, even all 3D games catered heavily to pure ALU performance (a few had optional pentium-specific settings -iirc Descent allowed that).
Another issue with quake is that you had very limited control over detail/quality settings (just resolution), so you couldn't reduce or disable perspective correction (one of the most FPU intensive tasks in the game). For a Pentium that made perfect sense (as disabling it would had little to no performance advantage due to the way its programmed) but for other chips it was a major disadvantage. (if not for that, Quake probably would have run decently well on fast 486 systems and perhaps marginally playable even on slower systems)
Tomb Raider is a good contemporary example for quake, actually using a more complex/advanced game engine (generally more complex levels/terrain/animation/lighting/etc), but still catered to non pentium systems and allowed perspective correction to be disabled entirely. (as well as variable resolutions and screen sizes)
The original Tomb Raider is probably one of the most intensive games that can actually run on a stock 386 (in terms of actually booting and working) . . . and actually might be semi-playable on a good 386DX40 system. (with cache, fast RAM, fast VESA VGA card, etc)
It would be interesting to get more details on Direct3D/Glide/OpenGL/etc driver support for fixed-point libraries, but as it is I can't really do much more than speculate. (but it definitely should have been possible to offer drivers catered to the K5 or 6x86's integer performance -let alone for 486 based systems for that matter -or the Winchip; so not 6x86 specific optimizations per se -to the same extent as the Pentium started getting- but more generalized support to cater to a broad spectrum inclusive of the 6x86's strengths -as well as pretty much every other non-Pentium chip on the market)
And back on the topic of Cyrix's CPU design emphasis: at the time of the MII/MX being designed, floating point performance was still relatively niche too, so that really wouldn't have been a major consideration either.
It appears the big problem came with Cyrix's developments after the National Semiconductor merger and the resulting shift in management.
No only did the shift in priorities limit things like updating the MII's FPU or adding 3DNow! (or improving MMX performance for that matter, and addressing the few missing pentium-specific instructions), but general development of faster conventional (ALU-oriented) MII models as well.
As it was, under NS, Cyrix engineers did still end up developing the next generation Cayenne core (pipelined FPU, 256k L2 cache, 3DNow!), but the development pace was much slower than it could have been and there was a general lack of interim architecture updates on top of that.
Aside from problems with ramping up clock speeds (and related late switch to denser/lower power smaller process tech), there was the late entry of a 100 MHz bus part, the FPU/multimedia instruction updates (namely 3DNow!), and the less significant problem of lacking complete P5 ISA compatibility. (it would have been rather like AMD leaving the K6 on older/high-voltage tech -actually worse since the K6 was on 300 rather than 350 nm, lacking full P5 compatibility, introducing the 100 MHz bus versions a year late and without 3DNow!, and lagging a year late with K6-III development while not designing the K7 at all)
Losing the IBM manufacturing connection probably didn't help either. (given IBM's excellent manufacturing facilities)