douglar wrote on 2022-12-23, 14:06:
Even on a 286, there was logic between the CPU and the memory, whether you want to call it a chipset or discreet components, they did the same job.
Yes.. Why are we arguing ? 😅
douglar wrote on 2022-12-23, 14:06:
Something had to send the refresh signals to the dram, even in the simple days before there was tiers of cached memory and I don't think the CPU ever did that in the PC world until much later.
Yes, Dynamic RAM (DRAM) needs a refresh. But a memory board can use Static RAM (SRAM), Pseudo-Static RAM (PSRAM) or have it's own refreshing circuit.
Last time I checked, one of those old memory boards worked just fine in a Pentium mainboard.
I think it was the AST Rampage 286, which can do both EMS and XMS.
https://retrocmp.de/hardware/rampage-286/rampage286.htm
IMHO, I think there's no need to use the motherboard's refreshing circuit for all the memory.
- ATs were nolonger stuck with the XT motherboard design and the old way of refeshing DRAM.
That's why DMA #0 became usable, for example. It's nolonger fulfilling it's original purpose.
https://www.oreilly.com/library/view/pc-hardw … ch01s03s02.html
I mean, you can't properly use the same refresh signal for a mixed-memory configuration, anyway.
Some memory is 60ns, some is 100ns, some 120ns.. If the AT mainboard uses 80ns SIMMs and the external memory board has 150ns chips..
Wait states would be needed, at least, if the memory board was using the motherboard's quicker refresh.
Speaking of.. As far as I know, AMDs later 80386 CPUs (am386DX40) had a static design.
Which meant, they could run as slow as needed until they halted.
There was no DRAM inside anymore, which could loose charge if the external clock was too slow.
https://en.wikichip.org/wiki/amd/am386
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