Doornkaat wrote on 2023-01-21, 14:36:
mkarcher wrote on 2023-01-21, 10:43:
The issue is that old PCI BIOS implementations reserve a fixed amount 128MB of address space for video memory on secondary PCI busses. AGP cards generally run on a secondary bus behind the PCI-to-AGP bridge that is part of the north bridge.
AGP is a secondary bus behind PCI? I always thought it was independent of PCI.🤔
Well, the matter is more complicated. You are right: Data from the processor to the AGP graphics card does not travel through the physical 32-bit 33MHz PCI bus on the motherboard. If data would physically travel through the PCI bus, you couldn't get higher performance from AGP than you can get from PCI. On the other hand, I am right, too: The configuration of the north bridge behaves as if the data would be passed through the the primary PCI bus to the Accelerated Graphics Port. The on-board PCI bus is configured as primary bus, with bus number 0. One of the devices that appear on the primary bus is the AGP bridge, which is configured as if it were a PCI to PCI bridge. The BIOS programs a range of MMIO space, a range of prefetchable memory space and a range of I/O ports that should be "forwarded" to AGP. The BIOS also assigns a non-zero bus number to the AGP, and programs the number of that bus into the AGP bridge. In a typical PC system, the AGP bridge is the only PCI-to-PCI bridge, so the AGP gets assigned bus number 1.
When the processor accesses memory, it communicates to the north bridge via the front side bus. The north bridge then looks up whether the address is inside the memory window(s) of the AGP bridge. If that is the case, the cycle is performed as AGP cycle. If the address is not inside the AGP window(s), the data is sent to the PCI bus instead. If the access is to an ISA card, it travels from the north bridge via PCI (on the 440BX) to the south bridge, and is then forwarded to ISA by the south bridge. Newer Intel chipsets, starting with the 800 series (i810, i815) use a special protocol between the north bridge ("memory controller hub") and the south bridge ("I/O controller hub"), called "hub link", which is twice as fast. Access to PCI devices are forwarded from the FSB to the hub link by the memory controller hub, and then from the hub link to the physical PCI bus by the "I/O controller hub". Yet, it looks to the operating system as if the north bridge, the south bridge and PCI cards are siblings on the same PCI bus.