There are plenty of 32 pin sram on ebay but which package type used? You have not mentioned which and if there pictures this would help.

Yes 1Mb (bits). Correct for 128k x 8 bit srams.

Your board uses 32pin DIP package and this one is 70ns, perfect for yours. Qty of 2, order lot of 2 to get 4 chips. I will pay more from a good sellers especially from USA or other countries *other than* chinese (fakes).

Second, you have to pay more to get these as I also find this not common type.

https://www.ebay.ca/itm/114067987824?hash=ite … ABk9SR4Khp43FYQ

From Israel:
https://www.ebay.ca/itm/114067987824?hash=ite … ABk9SR4Khp43FYQ

Cheers,

pentiumspeed wrote on 2023-02-06, 22:19:

There are plenty of 32 pin sram on ebay but which package type used? You have not mentioned which and if there pictures this […]
Show full quote

There are plenty of 32 pin sram on ebay but which package type used? You have not mentioned which and if there pictures this would help.

Yes 1Mb (bits). Correct for 128k x 8 bit srams.

Your board uses 32pin DIP package and this one is 70ns, perfect for yours. Qty of 2, order lot of 2 to get 4 chips. I will pay more from a good sellers especially from USA or other countries *other than* chinese (fakes).

Second, you have to pay more to get these as I also find this not common type.

https://www.ebay.ca/itm/114067987824?hash=ite … ABk9SR4Khp43FYQ

From Israel:
https://www.ebay.ca/itm/114067987824?hash=ite … ABk9SR4Khp43FYQ

Cheers,

i am not sure what package type it is and i thought it was 32 pin dip packages

Sorry, this a picture of the accelerator (not my one but same board)

I can add a picture of my one tonight if it needed

Robhalfordfan wrote on 2023-02-06, 21:50:

i am an amiga 500 plus with an mega midget racer accelerator and not sure it sram chips are dead because it fail is test at memo […]
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i am an amiga 500 plus with an mega midget racer accelerator and not sure it sram chips are dead because it fail is test at memory location 01000000-0107ffff and looking online for replacements and having a difficult time

the current chips in it are Inova s128k8-100cc

the manual says this

"Sockets are provided on the Mega-Midget Racer for 512K Bytes of 32-bit static random access
memory (SRAM). This is facilitated with four user installable 128K x 8-bit SRAM modules or
monolithic chips."

most 128k x 8-bit chips i am finding are 1mb and not sure it pin compatible or voltage compatible

Whenever you're dealing with RAM, capitalization is key.

1B=8b

So if this device has room for 512K Bytes (note capital B) with four 128K x 8-bit (note lower case b) chips/modules, there's no contradiction: 128k X 8 = 1Mb, 4x 1Mb = 4Mb, 4Mb = 512kB.

The only inaccuracy is that according to SI, kilo should be abbreviated with a lower-case k, not a capital K. But the bits/Bytes are spot on. You need four 1Mb/128kB chips with 128k x 8 structure.

As for pinout, just google datasheets. Here's the datasheet for the current chips:
https://www.datasheetarchive.com/pdf/download … e=M&term=S128K8

If in doubt, check pinout and voltage specs in datasheet of any potential replacement.

dionb wrote on 2023-02-07, 09:19:

Whenever you're dealing with RAM, capitalization is key. […]
Show full quote

Robhalfordfan wrote on 2023-02-06, 21:50:

i am an amiga 500 plus with an mega midget racer accelerator and not sure it sram chips are dead because it fail is test at memo […]
Show full quote

i am an amiga 500 plus with an mega midget racer accelerator and not sure it sram chips are dead because it fail is test at memory location 01000000-0107ffff and looking online for replacements and having a difficult time

the current chips in it are Inova s128k8-100cc

the manual says this

"Sockets are provided on the Mega-Midget Racer for 512K Bytes of 32-bit static random access
memory (SRAM). This is facilitated with four user installable 128K x 8-bit SRAM modules or
monolithic chips."

most 128k x 8-bit chips i am finding are 1mb and not sure it pin compatible or voltage compatible

Whenever you're dealing with RAM, capitalization is key.

1B=8b

So if this device has room for 512K Bytes (note capital B) with four 128K x 8-bit (note lower case b) chips/modules, there's no contradiction: 128k X 8 = 1Mb, 4x 1Mb = 4Mb, 4Mb = 512kB.

The only inaccuracy is that according to SI, kilo should be abbreviated with a lower-case k, not a capital K. But the bits/Bytes are spot on. You need four 1Mb/128kB chips with 128k x 8 structure.

As for pinout, just google datasheets. Here's the datasheet for the current chips:
https://www.datasheetarchive.com/pdf/download … e=M&term=S128K8

If in doubt, check pinout and voltage specs in datasheet of any potential replacement.

had no idea about the capital letters and how specific it is, learn something new every day 😀

ok would the sram chip in links above be compatible and work fine as i can get those locally ish

if not does the voltage has exactly the same as old ones and assuming the pinout has to exactly the same

Robhalfordfan wrote on 2023-02-07, 10:14:

if not does the voltage has exactly the same as old ones and assuming the pinout has to exactly the same

Those kind of chips exist in basically two voltage versions: Standard Voltage is meant to run ogf a 5V supply and Low Voltage is meant to run off a 3.3V supply. Low Voltage chips tend to habe an "L" in the model code. I'm confident your Amiga Accelerator doesn't even have a 3.3V supply, so make sure you get chips that don't break when you apply 5V to them.

mkarcher wrote on 2023-02-07, 10:49:

Robhalfordfan wrote on 2023-02-07, 10:14:

if not does the voltage has exactly the same as old ones and assuming the pinout has to exactly the same

Those kind of chips exist in basically two voltage versions: Standard Voltage is meant to run ogf a 5V supply and Low Voltage is meant to run off a 3.3V supply. Low Voltage chips tend to habe an "L" in the model code. I'm confident your Amiga Accelerator doesn't even have a 3.3V supply, so make sure you get chips that don't break when you apply 5V to them.

Looking at the datasheet for original chips, this what say for voltage (which is all greek to me) and the pinout

"Supply Voltage" is the relevant value here. This says it needs 5VDC+-10%.

So any similar 5V chip would work fine. If a chip indicates "Min 2.97 Max 3.63" then it's a 3.3V part and might get fried. So long as the Max is 5.5V it will be fine.

dionb wrote on 2023-02-07, 11:46:

"Supply Voltage" is the relevant value here. This says it needs 5VDC+-10%.

So any similar 5V chip would work fine. If a chip indicates "Min 2.97 Max 3.63" then it's a 3.3V part and might get fried. So long as the Max is 5.5V it will be fine.

ok looks the chip in link above (nec chip) might work as the pinout is mostly the same as original with some little different's and the "operating voltage" is 4.5 - 5.5

here is pic

The devil is in the details. "Little differences" could mean the difference between working and smoking.

Smoking isn't going to happen here, Vcc corresponds, as does Vss = GND.
Next the I/O lines are labeled 0-7 on the Inova datasheet but 1-8 on the NEC one. That's probably more naming convention than anything else.

What I'm worried about are pins 22 and 30. On the NEC chip they're labeled Chip Enable 1 and 2, but on the Inova chip 22 is Chip Select and 30 is NC. I'm not the world's greatest authority here, but Chip Select/Enable allows you to wire two chips in parallel and use this/these lines to determine which one is used. And it sounds like they're implemented in a different way. If your card uses this functionality, the NEC chip probably won't work.
But again, I know about the principle, not the details. Maybe someone with more relevant knowledge can indicate whether CE1/2 is the same as CS/NC.

dionb wrote on 2023-02-07, 14:17:

The devil is in the details. "Little differences" could mean the difference between working and smoking. […]
Show full quote

The devil is in the details. "Little differences" could mean the difference between working and smoking.

Smoking isn't going to happen here, Vcc corresponds, as does Vss = GND.
Next the I/O lines are labeled 0-7 on the Inova datasheet but 1-8 on the NEC one. That's probably more naming convention than anything else.

What I'm worried about are pins 22 and 30. On the NEC chip they're labeled Chip Enable 1 and 2, but on the Inova chip 22 is Chip Select and 30 is NC. I'm not the world's greatest authority here, but Chip Select/Enable allows you to wire two chips in parallel and use this/these lines to determine which one is used. And it sounds like they're implemented in a different way. If your card uses this functionality, the NEC chip probably won't work.
But again, I know about the principle, not the details. Maybe someone with more relevant knowledge can indicate whether CE1/2 is the same as CS/NC.

that what i was thought as chip enable on nec and nc on original and also the i/o lines being in slightly different places (as you said prob more naming thing) and hopefully someone with more knowledge will know and help and clarify and make sure as i have no idea

did they use the chip's on any sram modules?

dionb wrote on 2023-02-07, 14:17:

Next the I/O lines are labeled 0-7 on the Inova datasheet but 1-8 on the NEC one. That's probably more naming convention than anything else.

Not just "more" a naming convention, it is only a naming convention. That's perfectly fine.

dionb wrote on 2023-02-07, 14:17:

What I'm worried about are pins 22 and 30. On the NEC chip they're labeled Chip Enable 1 and 2, but on the Inova chip 22 is Chip Select and 30 is NC. I'm not the world's greatest authority here, but Chip Select/Enable allows you to wire two chips in parallel and use this/these lines to determine which one is used. And it sounds like they're implemented in a different way. If your card uses this functionality, the NEC chip probably won't work.
But again, I know about the principle, not the details. Maybe someone with more relevant knowledge can indicate whether CE1/2 is the same as CS/NC.

It's not the same, but it's not a problem, too. The chip is only enabled if all chip select inputs are at the level that activates the chip. Pin 22 is /CE1 on the NEC chip, and /CS on the Innova chip. (The bar over CS at the Innova chip means the same as the slash before CE on the NEC chip: This signal is active low. Because the slash is representable in plain text, I continue to write /CS instead of "CS with a bar above"). "Active low" means that Pin 22 needs to be at a voltage below 0.8V for the chip to be enabled. That's the case for both the NEC and the Innova chip. That's good. Furthermore, /CS is the only way that chip can be enabled/disabled, so if the card uses that functionality at all, it will use Pin 22. Now the NEC chip has a second chip enable signal, called CE2, without a slash in front of it. This signal needs be above 2.5V for the chip to be enabled. We now that the accelerator card doesn't require the functionality of CE2. There are two likely ways the accelerator card is designed: Either, it just doesn't connect pin 30, or the designers of that card knew about the NEC pinout variant (which is common, as is the Innova variant), and already connected that pin to +5V. It is unlikely that Pin 30 is connected to anything else, if that socket is meant to be used with 128K x 8 SRAM chips.

So you should check whether there is conductivity between pin 30 (CE2) and pin 32 (+5V). If yes, the NEC chip will work out-of-the-box. If not, check whether pin 30 is connected to ground (extremely unlikely, but better safe than sorry). If pin 30 is neither connected to ground nor to +5V, just add a small bodge wire to pull pin 30 high, and your card will be "NEC compatible".

mkarcher wrote on 2023-02-07, 16:31:

Not just "more" a naming convention, it is only a naming convention. That's perfectly fine. […]
Show full quote

dionb wrote on 2023-02-07, 14:17:

Next the I/O lines are labeled 0-7 on the Inova datasheet but 1-8 on the NEC one. That's probably more naming convention than anything else.

Not just "more" a naming convention, it is only a naming convention. That's perfectly fine.

dionb wrote on 2023-02-07, 14:17:

What I'm worried about are pins 22 and 30. On the NEC chip they're labeled Chip Enable 1 and 2, but on the Inova chip 22 is Chip Select and 30 is NC. I'm not the world's greatest authority here, but Chip Select/Enable allows you to wire two chips in parallel and use this/these lines to determine which one is used. And it sounds like they're implemented in a different way. If your card uses this functionality, the NEC chip probably won't work.
But again, I know about the principle, not the details. Maybe someone with more relevant knowledge can indicate whether CE1/2 is the same as CS/NC.

It's not the same, but it's not a problem, too. The chip is only enabled if all chip select inputs are at the level that activates the chip. Pin 22 is /CE1 on the NEC chip, and /CS on the Innova chip. (The bar over CS at the Innova chip means the same as the slash before CE on the NEC chip: This signal is active low. Because the slash is representable in plain text, I continue to write /CS instead of "CS with a bar above"). "Active low" means that Pin 22 needs to be at a voltage below 0.8V for the chip to be enabled. That's the case for both the NEC and the Innova chip. That's good. Furthermore, /CS is the only way that chip can be enabled/disabled, so if the card uses that functionality at all, it will use Pin 22. Now the NEC chip has a second chip enable signal, called CE2, without a slash in front of it. This signal needs be above 2.5V for the chip to be enabled. We now that the accelerator card doesn't require the functionality of CE2. There are two likely ways the accelerator card is designed: Either, it just doesn't connect pin 30, or the designers of that card knew about the NEC pinout variant (which is common, as is the Innova variant), and already connected that pin to +5V. It is unlikely that Pin 30 is connected to anything else, if that socket is meant to be used with 128K x 8 SRAM chips.

So you should check whether there is conductivity between pin 30 (CE2) and pin 32 (+5V). If yes, the NEC chip will work out-of-the-box. If not, check whether pin 30 is connected to ground (extremely unlikely, but better safe than sorry). If pin 30 is neither connected to ground nor to +5V, just add a small bodge wire to pull pin 30 high, and your card will be "NEC compatible".

ok thanks for the clarification

how can find out if there is conductivity with pin 30 and pin 32 etc

Robhalfordfan wrote on 2023-02-07, 17:03:

how can find out if there is conductivity with pin 30 and pin 32 etc

There are two ways to do it. Either you use a (digital) multimeter in "resistance measurement" (should display near zero) or "continuity check" (should beep) mode, or you inspect the board carfully, looking for PCB traces leading to pin 30.

mkarcher wrote on 2023-02-07, 19:21:

Robhalfordfan wrote on 2023-02-07, 17:03:

how can find out if there is conductivity with pin 30 and pin 32 etc

There are two ways to do it. Either you use a (digital) multimeter in "resistance measurement" (should display near zero) or "continuity check" (should beep) mode, or you inspect the board carfully, looking for PCB traces leading to pin 30.

When I having a look at the underside of the accelerator, I noticed (I forgot was there as I bought it years ago) that there wires going from and to what I think is pin 30 across all four SRAM sockets and down wire going down to a pin on the pga (which i am assuming that is ground) and I remember the person I bought this from done some repair work on it year and years ago, pic attached

could the repair job be the main problem?

ediflorianUS wrote on 2023-02-08, 09:21:

could the repair job be the main problem?

it could be but when looking for pcb traces at pin 30 - looks like there isn't and the wires gives it the traces and pulling that pin high - correct me if i am wrong

Robhalfordfan wrote on 2023-02-08, 09:31:

it could be but when looking for pcb traces at pin 30 - looks like there isn't and the wires gives it the traces and pulling that pin high - correct me if i am wrong

The bodge wire puts all pins 30 in parallel. It also connects these pins to a pin of the 68882. According the data sheet, that is the SIZE pin, and you see a trace to the A0 pin. If the 68882 is supposed to operate in 32-bit mode (which it should on the mega-midget racer to match the 68EC030), both A0 and SIZE are supposed to be conncted to +5V. This means that the extra wire provides the required level at pin 30, and the NEC chip should work without any problems. It's surprising that they didn't just bridge pin 32 to pin 30, but probably they did it the way it's done because that way allows clean looking straight wires.

mkarcher wrote on 2023-02-08, 21:08:

Robhalfordfan wrote on 2023-02-08, 09:31:

it could be but when looking for pcb traces at pin 30 - looks like there isn't and the wires gives it the traces and pulling that pin high - correct me if i am wrong

The bodge wire puts all pins 30 in parallel. It also connects these pins to a pin of the 68882. According the data sheet, that is the SIZE pin, and you see a trace to the A0 pin. If the 68882 is supposed to operate in 32-bit mode (which it should on the mega-midget racer to match the 68EC030), both A0 and SIZE are supposed to be conncted to +5V. This means that the extra wire provides the required level at pin 30, and the NEC chip should work without any problems. It's surprising that they didn't just bridge pin 32 to pin 30, but probably they did it the way it's done because that way allows clean looking straight wires.

ok i should be safe use buy use the nec chips without any problem and will the wires make the ce on pin 30 on the nec chip, pull low or high and thought it was ground pin the wire is going on the 68882 which the trace is going to NC pin (maybe i am looking at wrong datasheet)