eprom programmers are cheap and convenient, but dont test at appropriate speed, and as you noticed they provide black box pass/fail result without revealing internal methodology.
ideally you would have FPGA based test rig with programmable patterns, speed, pin driving strengths etc

rasz_pl wrote on 2023-04-23, 15:52:

eprom programmers are cheap and convenient, but dont test at appropriate speed, and as you noticed they provide black box pass/fail result without revealing internal methodology.
ideally you would have FPGA based test rig with programmable patterns, speed, pin driving strengths etc

Alternatively, is there a good DOS way to test cache itself/verify integrity when set to different fsb speeds and BIOS settings? Just push the system and look for crashes?

I don't know how one can effectively test L2 cache/verify everything is good in a built system.

me neither 🙁 I dont even know what would show flaw faster/better, a cache friendly code or one that doesnt fit in cache easily? I know original Quake is not really cache friendly, at least the SRAM cache can even slow it down https://dependency-injection.com/intel-430fx- … riton-l2-cache/