Grzyb wrote on 2023-09-28, 12:54:Back in the era, I encountered some claims that those "VIP" boards are inevitably slower than pure ISA+VLB or ISA+PCI ones.
Supp […]
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Back in the era, I encountered some claims that those "VIP" boards are inevitably slower than pure ISA+VLB or ISA+PCI ones.
Supposedly, making VLB and PCI work together requires some delays somewhere.
Is that true?
Or yet another legend, with the possible origin of many VIP boards being actually slower, but only due to the fake cache?
Certainly wasn't fake cache as PC Chips did that with ISA, ISA/PCI and ISA/VLB only boards too...
Thing is, with VLB and PCI, only one can directly interface with the CPU. VLB would be the obvious choice as it is essentially just the 486 CPU bus - but it is vey limited in number of devices: 1 or 2 easily, a 3rd generally only with wait states, and a PCI controller counts as a device. So if you run PCI of VLB, you will almost always need those wait states, which slow it down vs VLB with just 1 or 2 devices.
You can also use a native PCI chipset and run the VLB off the PCI bus. As PCI isn't electrically limited the way VLB is that is a robust solution, but the PCI bus only runs at 33MHz, meaning that you then lose 40/50MHz VLB operation (or you do have it, but everything just gets bottlenecked at the bridge chip).
So there's always a compromise involved. Note however that you'll frequently hit the same bottlenecks with VLB-only (wait states if you run more than 2 devices and/or run at high clock speeds) or PCI-only (that PCI VGA card is also limited to 32b, 33MHz), so in practice I doubt it makes much difference. What does make a difference is the fact that those VIP-IO boards are some of the most complicated boards to configure (manual interrupts for early PCI implementations, wait states for VLB, huge range of late So3 CPUs with different cache, clock and voltage options), and more complexity means more ways to mess it up and configure sub-optimally. I strongly suspect that played a bigger role than inherent hardware limitations.
In addition, in the case of Pentium VIP-IO chipsets, the ones that supported it were glacially slow to start with; it was OPTi's niche, and they had excellent 486 chipsets, but until the Viper-M (which was ISA/PCI only and above all too little, too late) their Pentium chipsets were abominably slow regardless of which buses they used.