Reply 100 of 108, by mkarcher
rasz_pl wrote on 2023-08-05, 06:51:why CY7C1009D and not something like https://eu.mouser.com/ProductDetail/Alliance- … 8C401801-QC166N? 3.3V might be a problem, but Iv seen people use 3.3v sram in Amigas with success (>year with no failures)
Going 3.3V can be a solution. At my standard hobbyist's electronics retailer, I can get new CY7C1019DV33-10V (128k x 8, 10ns, 3.3V) for 2.65€ a piece. Dropping the operating voltage from 5V to 3.6V or something like that is not a problem at all. The issue I currently see is that these chips are not specified to be 5V tolerant, so they start clamping the data signals to 4.0V through their ESD diodes when you power them with 3.6V. If there are only TTL-type outputs on the local bus, this is likely not a problem, because they can't drive "high" very hard. On the other hand, if there are 5V CMOS outputs, this clamping action can cause excessive current on the data lines. Do you have any pointers to discussions of the Amiga people using 3.3V SRAM at 5V, so I can check their experience?
The memory chip you suggest will not work. That's not asynchronous SRAM as required by 486 processors, but around 2 generations newer. They can be seen as the successor of pipelined burst SRAM. Their bus protocol is completely clock synchronous like the interface of SDRAM. They provide really high performance for systems that can use them, but a 486 mainboard just doesn't match synchronous ZBT SRAMs.