L2 Cache via CPU interposer? \ VOGONS

L2 Cache via CPU interposer?

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First post, by megatog615

Posted on 2024-03-11, 18:12

megatog615 Offline

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Has there ever been a CPU interposer, for say, socket 1/2/3 that adds L2 cache for systems with broken/fake/nonexistent cache?

Reply 1 of 2, by jakethompson1

Posted on 2024-03-11, 18:16

jakethompson1 Offline

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Interesting idea; obviously a trivial example would be the later 486es with 16KB L1 instead of 8, or Pentium OverDrive with 32KB

Reply 2 of 2, by megatog615

Posted on 2024-03-11, 18:21

megatog615 Offline

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It could also be useful as a way to introduce cache even for systems that can support it properly, by using more available SMD cache chips such as the ones that appeared on later socker 7 boards instead of the old DIP chips that are commonly sold fake or broken on eBay.

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