Chkcpu wrote on 2024-02-27, 12:55:Hi all, […]
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Hi all,
I received several requests for changes to the QDI Titanium IB+ BIOS. So I have been working on a patch J.3 BIOS update for this jumperless board, and I made some progress.
@JustJulião,
I was able to add IDT WinChip 2/2A/2B support. The new BIOS now properly detects these IDT models and displays them correctly as IDT WinChip 2.
The SpeedEasy CPU SETUP code is very difficult to change so the multiplier settings are still the same as for the WinChip C6 but they work the same way on the WinChip 2 and 2B. Only for the WC-2A, you have to use the translation table I put up earlier in this thread, when setting the multiplier.
@S0N1C,
I read your request about Tillamook support and I’ve started to look into that.
The BIOS detects and displays the Tillamook just fine but support for this CPU is completely missing in the SpeedEasy CPU SETUP, just as you reported. Instead, the BIOS sets the board as for a standard non-MMX Pentium with a single voltage rail with 3.4V! 🙁
The first step will be to change this to a dual voltage Pentium MMX setup. This shouldn’t be too difficult. But secondly, the default 2.8V setting for the MMX has to be lowered to 2.0V for the Tillamook only. This will be a challenge…
Note that the 2.0V Vcore and 3.3V Vi/o are the lowest possible settings on this board due hardware limitations.
@Sphere478,
You did the interposer for the Tillamook and other socket 7 CPUs, so could you help us with the multiplier settings on the Tillamook? Without hardware changes, this jumperless QDI BIOS can control the BF0/BF1 pins of the original Pentium MMX only. The Tillamook BF2 is therefore out of reach without an interposer.
Can you tell us which multipliers are possible on the Tillamook by using these original BF0/BF1 pins only?
To all,
Other bugfixes that I will add to the patch J.3 BIOS:
- A fix for the second 64GiB HDD limit bug. This will fix a hang when initiating drive detection via the IDE HDD DETECTION menu in the BIOS on a drive > 64GiB.
- An improved 32GiB HDD limit bugfix that allows drives > 128GiB to be attached, so at least 128GiB can be used from a larger drive (maximum 640GiB).
- A fix for the Win98 UDMA bug. This allows ATA66/100/133 drives to work correctly in UDMA mode 2 (33MB/sec) on the on-board IDE channels by enabling DMA mode in device manager. Without this fix, these faster drives would revert to PIO mode 4.
I will be back with an updated progress report soon. 😉
Jan
Hi all,
It’s been 5 weeks since I promised a new patch J.3 BIOS for the QDI Titanium IB+, so high time for an update. 😉
Reverse engineering the SpeedEasy CPU Setup menu logic in this jumperless BIOS proved to be educational. I salute QDI’s BIOS engineers for this innovative piece of software.
Yes, there is a story here.
When patching a compressed socket 7 Award BIOS, I only made changes in the compressed main module (original.tmp) and its BIOS extension helper module (Awardext.rom), until now.
Looking at the main BIOS module, where most POST routines and all the BIOS Setup menus are located, I did find the logic, data structures, and associated CPU detection for the SpeedEasy menu. For the patch J.2 BIOS from 2003, this is where I made a simple change to include the K6-2+/K6-III+ in the SpeedEasy menu. However the low level logic that this jumperless motherboard needs to directly talk to the hardware for CPU voltage, FSB, and multiplier control was nowhere to be found.
So I started looking at the Bootblock code in the uncompressed part of the BIOS. Together with the ESCD block and the decompression engine, this initial boot code takes up the top 20KB of this 128KB BIOS. The remaining 108KB code space is for the compressed modules.
I never had to analyze and patch a Bootblock before, so disassembling this code was a new experience. The tightly packed boot code in the 8KB Bootblock didn’t show any room. But the 4 KB block of the decompressing engine had some space left and indeed, there I found the missing low level code of the SpeedEasy CPU Setup!
In hindsight, this is a logical place to put the low level jumperless control. It provides very early control during bootup for setting Vcore and allows a quick reboot for a changed multiplier setting. The CPU only samples the BF2/BF1/BF0 pins when coming out of reset and disregards any changes thereafter.
Because the SpeedEasy_exec code (as I call it) in the Bootblock is executed before any compressed modules are decompressed in RAM, it cannot “talk” to the SpeedEasy code in the main BIOS module. Passing CPU Setup information from the POST routines to the Bootblock is all done via CMOS registers that retain this information during reboot or power cycle. Clever.
@JustJulião,
Armed with these findings, I started patching for WinChip 2 support. Changes in the J.3 BIOS are:
- Added detection of the WinChip 2(A)(B) CPU
- Expanded the CPU Type display for showing the correct IDT WinChip 2 string
- Added proper X2.5, X3, X3.33, X3.5 multiplier selections for the WinChip 2A in the SpeedEasy CPU Setup (Jumper Emulation mode)
These additional changes are also done:
- The improved 32GB HDD limit bugfix
- A fix for the second 64GB HDD limit bug
- A fix for the Win98 UDMA bug
After finding-out how to change the Bootblock without triggering a BIOS checksum error, I made an additional change to the SpeedEasy_exec code.
- I expanded the K6 model 7/K6-2 CPU protection against a too high Vcore, to include the K6-III/K6-2+/K6-III+ models. This logic resides in the Bootblock at the end of the first POST step (C0) and protects the CPU when the BIOS hangs early during POST due to BIOS corruption or failed/missing RAM.
CAUTION: The above means that you have to flash the patch J.3 BIOS WITH Bootblock!
Here is the new QDI TIB+ patch J.3 BIOS for you to try-out.
http://www.steunebrink.info/bios/T1BP_J3.zip
I’m curious how it works with your WinChip 2A, specifically the SpeedEasy multiplier selections.
@S0N1C,
I also did the extensive Bootblock analysis in view of better Tillamook support.
The change to have the Tillamook detected as a dual voltage Pentium MMX in the SpeedEasy CPU Setup works fine in this patch J.3 BIOS, but I was unable to lower the lowest Vcore from 2.8V to 2.0V.
At the moment I lack the time to investigate this further, so I hope you have another board to run this nice Tillamook CPU.
Cheers, Jan