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Any tips on repairing a faulty QDI V4P895P3-SMT V5.0?

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First post, by TbR78

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Hi all,

I don't know if anyone would have some tips or pointers regarding a 486 mainboard that POSTs to an unknown code C0?

The board is a 486 socket 3 board with 3x VLB and 7x ISA slots, 256kB cache and has an Am486DX2 in it. It has an Opti 82C895 / 82C602 chipset and AMI WinBIOS.

This is a board I have in my possession since I was 16 years old (I bought it new) and I kept it for many years in a box. So I know its history, and when decommissioned it landed straight in the box on my shelve. The battery was a coin cell that I removed long time ago. There's no corrosion visible (battery was not present to leak). I decided to put it back in use out of interest and curiosity to play some old games. Anyway 😀

So, when I power on the board, the POST card flashes around 15 codes or so and then hangs at code C0. No beeps.

Let me explain what I have tested so far (and seems to be OK):

  • BIOS chip is working, can dump the contents and it matches identically to one of the BIOS images on the retroweb.
  • I flashed an EEPROM with the latest version of the BIOS image, but same POST appears (code C0)
  • Without a BIOS chip in the socket, the board doesn't POST at all (no codes appear).
  • Without a CPU in the socket, the board doesn't POST at all (no codes appear).
  • The CPU works (tested in another board). I checked the jumpers 10 times now, look all correct.
  • The same happens with/without memory (tried various working 72 pin and 30 pin modules).
  • Removing the cache chips gives the same POST. The cache chips all pass in a tester (and I tried other chips).
  • VCC seems to be 3.45V (which is on the high side, but I think the board can only do 3.45V or 5V). Besides, this CPU was always in this board. The Am486 datasheet states that 3.3V +- 0.3V is acceptable.
  • Tried with coin cell inserted.
  • Tried with 2 different VGA cards and without. Doesn't make a difference.
  • The 32kHz crystal seems to hang at 5V (no frequency). I'm not sure if this might be preventing the board from booting?
  • I disassembled the BIOS binary in Ghidra (and unpacked the compressed parts of the BIOS) and I cannot find any out 80h, al instruction that could send C0. I see plenty of occurrences where other known/documented POST codes are sent to port 80h, but cannot find the place that sends this one C0 (I might be overlooking it, but just to say it's not obvious). The codes before the C0 are also not immediately visible in the code (although I haven't paid too much attention there).
  • I ran the BIOS in a custom 86box machine (I added it in the 86box sources to emulate my particular board), and added debug out to print all POST codes. Code C0 never appears.
  • I think the D0-D7 lines are working, because I listed all the codes that flash by until C0, and OR-ing these gives FF (meaning that all data lines at least work).

I'm a bit unsure where to look for the problem. As far as I understand, POST codes are a part of the BIOS code and nothing else will write to port 80h (prior to execution of the BIOS). Is this a correct assumption? Or can the chipset also do this (I didn't see it in the datasheets or documentation that is available)?

Do I need to try some deoxide or something?

I'm a bit lost here 😀 Would really like to get this board back up and running.

Any idea is welcome 😀 Thanks for reading.

Reply 1 of 8, by jakethompson1

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Hello,

No great ideas but can you list the exact BIOS from TRW that you are using, and also, flip through the POST cards logged by your card leading up to the C0 (in what order)
Maybe we can figure out what happens between the last good code and the C0, or whether it's happening in the uncompressed or compressed part

Reply 2 of 8, by Thermalwrong

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Yeah I saw something similar the other day with POST codes from a Toshiba, it gave 05-hex which is a meaningful code, then gave 4C which is meaningless.
This mainboard had some breaks on address / data lines for the EDO memory going into some resistors and my theory is that the invalid code happened because it got as far as code 05 (ram init > sm-ram check) then went off the rails and started processing junk data past a certain point.

Reply 3 of 8, by TbR78

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Thanks for the feedback already.

The BIOSes are available on TRW as https://theretroweb.com/motherboards/s/qdi-v4 … -v4.x-v5.x#bios. I dumped the original EPROM and it matches 100% with v5.0. I also tried v5.2 with an EEPROM chip, same resulting POST.

Regarding the sequence of POST codes, there is not one that seems to make sense. Also, the C0 appears with or without RAM (all banks empty) and with or without cache chips. So it seems to go wrong well before any memory initialization or BIOS decompression. Dissassembly suggests that C2 should be the very first POST code (and it's not).

For what it's worth, here is the sequence (consistently the same each try):
d3 34 20 e4 00 36 7c 10 8e f8 10 e0 10 c0 00 20 00 08 00 c0 00 20 25 34 00 73 33 30 03 22 40 34 02 71 50 34 00 70 66 34 03 32 08 34 02 71 99 34 03 72 00 20 00 08 00 c0 00 20 00 c0 hang

Reply 4 of 8, by jakethompson1

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Agreed, those codes have no correspondence to what I see coming from an emulator. The "4.0" one on there looks like it might not be compressed (and therefore might get further along before breaking) if you think it's even worth trying.

Reply 5 of 8, by TbR78

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That’s definitely worth trying… thanks

Reply 6 of 8, by rasz_pl

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TbR78 wrote on 2024-06-23, 20:02:

This is a board I have in my possession since I was 16 years old (I bought it new) and I kept it for many years in a box

Impressive.

TbR78 wrote on 2024-06-23, 20:02:

list

Even more impressive 😮

TbR78 wrote on 2024-06-23, 20:02:

[*] The 32kHz crystal seems to hang at 5V (no frequency). I'm not sure if this might be preventing the board from booting?

sometimes in some boards with RTC integrated in the chipset that clock not running prevents proper reset
Here 82C602 has RTC integrated

RST# 23 I Reset: PWRGD input from the power supply.
RSTDRV 76 O Reset Drive: An active high reset output to the AT bus.
LRESET# Local Reset: An active low reset output to the VESA local bus.

maaaybe no running RTC clock is messing with its internal reset despite having clear reset input

TbR78 wrote on 2024-06-23, 20:02:

[*] I disassembled the BIOS binary in Ghidra

did it handle classing no stack "procedure calls"?

mov     sp, offset off_F01E4
jmp     ret_sub_1
off_F01E4       dw offset loc_F01E6
loc_F01E6:

or is that Award only thing and Ami does something else?

TbR78 wrote on 2024-06-23, 20:02:

cannot find any out 80h, al instruction that could send C0

Award has only couple clear places where you can see actual code, rest is handled by a counter or a lookup table so hard to spot without tracking execution/wasting brain power by executing in memory 😀

TbR78 wrote on 2024-06-23, 20:02:

[*] I ran the BIOS in a custom 86box machine (I added it in the 86box sources to emulate my particular board), and added debug out to print all POST codes. Code C0 never appears.

C0 is not in any of my AMI post code lists either.

Start by putting something (scope/logic analyzer) on reset pins of main chips
http://www.bitsavers.org/components/opti/data … V1.0_199409.pdf
http://www.bitsavers.org/components/opti/data … ices_199411.pdf

https://github.com/raszpl/FIC-486-GAC-2-Cache-Module for AT&T Globalyst
https://github.com/raszpl/386RC-16 memory board
https://github.com/raszpl/440BX Reference Design adapted to Kicad
https://github.com/raszpl/Zenith_ZBIOS MFM-300 Monitor

Reply 7 of 8, by TbR78

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rasz_pl wrote on 2024-06-25, 01:36:
TbR78 wrote on 2024-06-23, 20:02:

This is a board I have in my possession since I was 16 years old (I bought it new) and I kept it for many years in a box

Impressive.

Thanks 😀

rasz_pl wrote on 2024-06-25, 01:36:
Even more impressive :o […]
Show full quote
TbR78 wrote on 2024-06-23, 20:02:

list

Even more impressive 😮

TbR78 wrote on 2024-06-23, 20:02:

[*] The 32kHz crystal seems to hang at 5V (no frequency). I'm not sure if this might be preventing the board from booting?

sometimes in some boards with RTC integrated in the chipset that clock not running prevents proper reset
Here 82C602 has RTC integrated

RST# 23 I Reset: PWRGD input from the power supply.
RSTDRV 76 O Reset Drive: An active high reset output to the AT bus.
LRESET# Local Reset: An active low reset output to the VESA local bus.

maaaybe no running RTC clock is messing with its internal reset despite having clear reset input

Yes, first thing to do is replacing this crystal... is on my todo list.

rasz_pl wrote on 2024-06-25, 01:36:
did it handle classing no stack "procedure calls"? […]
Show full quote
TbR78 wrote on 2024-06-23, 20:02:

[*] I disassembled the BIOS binary in Ghidra

did it handle classing no stack "procedure calls"?

mov     sp, offset off_F01E4
jmp     ret_sub_1
off_F01E4       dw offset loc_F01E6
loc_F01E6:

or is that Award only thing and Ami does something else?

The AMI WinBIOS is full of these type of calls. I just went manually through the first block of code until I has enough POST code points recognized in the code. This way of calling allows code to run in ROM without any memory (that's why calls are done this way).

rasz_pl wrote on 2024-06-25, 01:36:
TbR78 wrote on 2024-06-23, 20:02:

cannot find any out 80h, al instruction that could send C0

Award has only couple clear places where you can see actual code, rest is handled by a counter or a lookup table so hard to spot without tracking execution/wasting brain power by executing in memory 😀

I understand, but the AMI BIOS is quite "readable" and I can really see the POST codes in the code, exactly the same as the ones I see in 86Box when running the bios.

rasz_pl wrote on 2024-06-25, 01:36:
TbR78 wrote on 2024-06-23, 20:02:

[*] I ran the BIOS in a custom 86box machine (I added it in the 86box sources to emulate my particular board), and added debug out to print all POST codes. Code C0 never appears.

C0 is not in any of my AMI post code lists either.

I know 🙁

rasz_pl wrote on 2024-06-25, 01:36:

Start by putting something (scope/logic analyzer) on reset pins of main chips
http://www.bitsavers.org/components/opti/data … V1.0_199409.pdf
http://www.bitsavers.org/components/opti/data … ices_199411.pdf

I'll check the datasheets that you provided... I'm going to replace the crystal (like I said) and will see if that helps in any way.

Thanks for the ideas.

Reply 8 of 8, by TbR78

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So, the two datasheets: I already hade them 😀

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