You can still buy 16MB 30-pins SIMMs.

I once played a bit with 386DX-40, 32MB RAM, ATI Mach64 4MB VRAM, CF for HDD... it run Win95 very nice. But the CPU was overall too slow for anything meaningful.

butjer1010 wrote on 2024-06-28, 11:20:

Imagine 386 computer with 64MB of RAM????

I have such a thing - but using 72-pin SIMMs.

Anyway, 16 MB 30-pin modules are precious for AWE32 users.

kixs wrote on 2024-06-28, 11:26:

You can still buy 16MB 30-pins SIMMs.

I once played a bit with 386DX-40, 32MB RAM, ATI Mach64 4MB VRAM, CF for HDD... it run Win95 very nice. But the CPU was overall too slow for anything meaningful.

Yes, i saw it on ebay, but they were to expensive. This way would be much cheaper 😀
Woow, 386 with 32MB!!! Imagine this machine on early nineties 😀 ????

Grzyb wrote on 2024-06-28, 11:28:

butjer1010 wrote on 2024-06-28, 11:20:

Imagine 386 computer with 64MB of RAM????

I have such a thing - but using 72-pin SIMMs.

Anyway, 16 MB 30-pin modules are precious for AWE32 users.

You have 386 with 64MB ????? Aaaaaaaaaaaaaa, that is awesome 😀
Yes, this is perfect also for AWE....... Didn't think about that.....

butjer1010 wrote on 2024-06-28, 11:40:

kixs wrote on 2024-06-28, 11:26:

You can still buy 16MB 30-pins SIMMs.

I once played a bit with 386DX-40, 32MB RAM, ATI Mach64 4MB VRAM, CF for HDD... it run Win95 very nice. But the CPU was overall too slow for anything meaningful.

Yes, i saw it on ebay, but they were to expensive. This way would be much cheaper 😀
Woow, 386 with 32MB!!! Imagine this machine on early nineties 😀 ????

You were lucky if you had 8MB.

I don't find the price for 4x16MB too expensive - if you want them for some reason of course. I don't 😉

kixs wrote on 2024-06-28, 11:45:

butjer1010 wrote on 2024-06-28, 11:40:

kixs wrote on 2024-06-28, 11:26:

You can still buy 16MB 30-pins SIMMs.

I once played a bit with 386DX-40, 32MB RAM, ATI Mach64 4MB VRAM, CF for HDD... it run Win95 very nice. But the CPU was overall too slow for anything meaningful.

Yes, i saw it on ebay, but they were to expensive. This way would be much cheaper 😀
Woow, 386 with 32MB!!! Imagine this machine on early nineties 😀 ????

You were lucky if you had 8MB.

I don't find the price for 4x16MB too expensive - if you want them for some reason of course. I don't 😉

Hehe, Yes, You have the point! For me - Bragging only 😀 !!!!! I had 4MB on my SX33.....

Is there a point in going over 32MB on 386? I've seen these 16MB 30-pin SIMMs on sale but:
- price is well outside the range of what I'm willing to spend
- not all mobos will accept these, though it seems most late 386 or 386/486 chipsets will
- 128k of cache, with the usual 8k TAG, can only cover 32M in WB mode
- using WT cache (or 256k cache with slower timings) might negate any benefits of huge RAM
- RAM timings might require relaxing, that's also a big no-no on a 386
- and lastly most mobos will benefit from bank interleaving but for that 2 full banks are required

Bank interleaving might work to some extent with non-symmetrical memory layout, likt 16M+4M - I have such setup on OPTi mobo and it does seem to be faster in DOS benchmarks than just 16MB in one bank. I suspect it would only work for the first 4M but again for DOS that's OK, this is where program will be loaded so the code execution will benefit even if the data might end up beyond 4M range.

I'm going to watch that YT video later because I was considering making my own SIMM sticks but for "general purpose" even 32MB on 386 is maxing out the mobo (and that's DX, the SX can't even address this much). I think going over 32M is just an interesting experiment and not something that people should consider.

Deunan wrote on 2024-06-28, 11:49:

Is there a point in going over 32MB on 386? I've seen these 16MB 30-pin SIMMs on sale but: - price is well outside the range of […]
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Is there a point in going over 32MB on 386? I've seen these 16MB 30-pin SIMMs on sale but:
- price is well outside the range of what I'm willing to spend
- not all mobos will accept these, though it seems most late 386 or 386/486 chipsets will
- 128k of cache, with the usual 8k TAG, can only cover 32M in WB mode
- using WT cache (or 256k cache with slower timings) might negate any benefits of huge RAM
- RAM timings might require relaxing, that's also a big no-no on a 386
- and lastly most mobos will benefit from bank interleaving but for that 2 full banks are required

Bank interleaving might work to some extent with non-symmetrical memory layout, likt 16M+4M - I have such setup on OPTi mobo and it does seem to be faster in DOS benchmarks than just 16MB in one bank. I suspect it would only work for the first 4M but again for DOS that's OK, this is where program will be loaded so the code execution will benefit even if the data might end up beyond 4M range.

I'm going to watch that YT video later because I was considering making my own SIMM sticks but for "general purpose" even 32MB on 386 is maxing out the mobo (and that's DX, the SX can't even address this much). I think going over 32M is just an interesting experiment and not something that people should consider.

Yes, the Video is about this 😀

These SIMMs were not common, but also not totally unheard of. I have a set of four bought a few years back for a pretty modest sum. Biggest application wasn't actually in PCs - 286 and 386SX needed SIMMs in pairs and didn't support over 16MB total anyway and 386DX needed SIMMs per four and almost nothing you would do under DOS would come close to needing 16MB and cacheable limits tend to actually harm performance when going insane with RAM - but in systems like the Mac SE/30, which had 8 SIMM slots and as well as system 6/7 also ran A/UX unix which was very grateful for 64 or even 128MB courtesy of 4 or 8 16MB SIMMs.

That said, this DIY approach is amazing, particularly as it uses common-as-muck components to make something pretty unusual, even if it is something of a solution in search of a valid problem.

The most interesting use case IMHO is running modern OSs on this hardware. Something like NetBSD will run on a 486DX, but needs at least 64MB and appreciates more. Give it 128MB (8x 16MB SIMMs) and it will purr along happily and is safe to actually expose to internet and run (lightweight...) services.

Deunan wrote on 2024-06-28, 11:49:

- not all mobos will accept these, though it seems most late 386 or 386/486 chipsets will

Important point there, if the higher address lines they need aren't connected, then no amount of trying different BIOSes or CPUs will fix it. Some 286 boards with SIMM or SIPP, don't even support 4MB modules, so you could have 386 boards based off those, but only I think SX which should be a large clue.

dionb wrote on 2024-06-28, 13:17:

These SIMMs were not common, but also not totally unheard of. I have a set of four bought a few years back for a pretty modest sum. Biggest application wasn't actually in PCs - 286 and 386SX needed SIMMs in pairs and didn't support over 16MB total anyway and 386DX needed SIMMs per four and almost nothing you would do under DOS would come close to needing 16MB and cacheable limits tend to actually harm performance when going insane with RAM - but in systems like the Mac SE/30, which had 8 SIMM slots and as well as system 6/7 also ran A/UX unix which was very grateful for 64 or even 128MB courtesy of 4 or 8 16MB SIMMs.

That said, this DIY approach is amazing, particularly as it uses common-as-muck components to make something pretty unusual, even if it is something of a solution in search of a valid problem.

The most interesting use case IMHO is running modern OSs on this hardware. Something like NetBSD will run on a 486DX, but needs at least 64MB and appreciates more. Give it 128MB (8x 16MB SIMMs) and it will purr along happily and is safe to actually expose to internet and run (lightweight...) services.

Yes, the approach is amazing, really like this video. 64MB RAM in 386 is mainly for bragging 😀 !!! Imagine 1993. - 386 with 64MB hehehe

BitWrangler wrote on 2024-06-28, 14:22:

Deunan wrote on 2024-06-28, 11:49:

- not all mobos will accept these, though it seems most late 386 or 386/486 chipsets will

Important point there, if the higher address lines they need aren't connected, then no amount of trying different BIOSes or CPUs will fix it. Some 286 boards with SIMM or SIPP, don't even support 4MB modules, so you could have 386 boards based off those, but only I think SX which should be a large clue.

I think SX can do max 32MB, DX can go up to 64MB!

butjer1010 wrote on 2024-06-28, 14:40:

I think SX can do max 32MB, DX can go up to 64MB!

Like the 286 the 386 SX has 16 data pins and 24 address pins (A0 is implemented with special logic).
So the maximum addressable area is 16 MBytes.
But. Some chipsets implement EMS memory in hardware and can provide 32 MB LIM EMS.

For embedded computing, the 386 EX has 2 more address lines.

DX with its 32 address pins (A0 and A1 are implemented with special logic) can go up to 4 GB of course!

Windows 98 needs at least 16MB so that's a possibility if you have 32 or 64MB

butjer1010 wrote on 2024-06-28, 14:40:

BitWrangler wrote on 2024-06-28, 14:22:

Deunan wrote on 2024-06-28, 11:49:

- not all mobos will accept these, though it seems most late 386 or 386/486 chipsets will

Important point there, if the higher address lines they need aren't connected, then no amount of trying different BIOSes or CPUs will fix it. Some 286 boards with SIMM or SIPP, don't even support 4MB modules, so you could have 386 boards based off those, but only I think SX which should be a large clue.

I think SX can do max 32MB, DX can go up to 64MB!

Not a normal one Intel had a 386sx derivative called an SL that went into laptops that could address 32mb

I also forgot about the ex which could handle 64mb

The big 32pin SIMMs were mostly for non-IBM systems though there were 486 machines that used 30 pin or a combo of 2x-72pin+4x-30pin

I had a PCCHIPS 486 board that supported 30 pin and 72 pin

There is also apparently an early Pentium motherboard (TMC PAT45PVS Socket 4) that came in a version with 30 pin simms, can’t imagine how meh that would be.

Watched the video - my points stand. This is an interesting experiment but not much more, at least not on that particular mobo. There's even a CACHECHK result posted at 21m:15s and it's pretty obvious the mobo is only caching the first 32MiB. Still OKish to use as a RAMdisk (if it can be installed using top of memory) but not really otherwise. In fact an OS that's capable of using all that memory (like Win9x or Linux) might throw in some frequently accessed code or data there and now you have a system that's slower than 32M one.

OPTi 82C495SLC is not a great 386 chipset. It's not bad as such, and it's stable, but the RAM timings are pretty bad compared to something like Unichip U4800-VLX. So the fact these these are newer, 50ns chips doesn't matter here. Also the bank interleaving on OPTi is not really providing much of a boost but I would still prefer 16+16 configuration.

I have one criticism of this project though, and that is the use of 3V3 chips in 5V system. It's not enough to provide the correct supply voltage - the I/O levels must also be matched. These are LVTTL chips and not 5V tolerant, although the datasheet states that the upper limit is 4.6V - that's high enough that these won't die soon. But the overshoots during swithing, and possibly chipset write levels, will degrage and damage the I/Os eventually.

Is there any practical use for that FPM/EDO switch?
Are there any systems using 30-pin SIMM that can make use of EDO ?

I saw the video, and both modules, 4 MB and 16 MB each, are very interesting, for two reasons, both for the 386DX, but also for the early 486DX, let's say a 486DX2-66 or better, could be used with 4 modules of 16MB, and possibly a part of the 64 MB, it could be used for a RAMDISK, or for OS subsequent to Windows 95, therefore 98 or ME.

Deunan wrote on 2024-06-28, 18:26:

[..]
I have one criticism of this project though, and that is the use of 3V3 chips in 5V system. It's not enough to provide the correct supply voltage - the I/O levels must also be matched. These are LVTTL chips and not 5V tolerant, although the datasheet states that the upper limit is 4.6V - that's high enough that these won't die soon. But the overshoots during swithing, and possibly chipset write levels, will degrage and damage the I/Os eventually.

Just watched the video and I was about to comment the same, the chips used are not suitable - so anyone looking to build these should find some drams with 5v tolerant I/O