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Different Am486 DX4 CPU handling between BIOSes?

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First post, by TbR78

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Hi all, just posting something I noticed when playing around with different variations of the Am486 DX4 CPUs on an Opti 82C895 chipset motherboard (Jetway J-403TG v2.0).

So, on TheRetroWeb this board has BIOS dumps from three manufacturers (yes, all big 3 - AMI, Award and MrBIOS). So, I was playing around testing all of these BIOSes and found that the MrBIOS allows very quick startup (boot) and some cool keyboard shortcuts for changing the speed/cache usage. And, Award and AMI take a longer time displaying logos and messages during boot, so I decided to stick with the MrBIOS one. All good.

When testing the BIOSes, I was using an Am486 DX4-100 NV8T (package 25253, standard 8kB L1 cache).

At some point I wanted to test an Am486 DX4-100 SV8B (package 25544, a hidden 16kB L1 cache variant, produced at the end of the 486 era), but the board would not boot (got beep error codes and some POST code). At first I thought the CPU was defective. However, switching the BIOS to the original Award BIOS made the board boot just fine (showing DX4-S at 100MHz).

So, I'm quite surprised that the MrBIOS apparently does not like the SV8B version of the CPU line (which should be 100% the same, except for the reported CPU ID code in DX register at boot).

Does anyone know more about why a BIOS wouldn't want to boot in such cases? Just curious šŸ˜€

Reply 1 of 6, by Deunan

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Perhaps this BIOS doesn't know how to properly deal with WB L1 cache? Or not for this particular CPU.

Reply 2 of 6, by dionb

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Maybe something is explicitly set for WT cache. It might help to disable L1 cache with the NV8T installed, then see if it boots with SV8B - and if it does, see if you can re-enable L1 cache.

Reply 3 of 6, by Disruptor

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Am486DX4 (N)V8T has to be jumpered like a DX2 but with 3.3 Volt. It does not have a CPUID command.
Am486DX4 SV8B has to be jumpered like a DX4. It can be changed from write through operation to write back operation.

Reply 5 of 6, by TbR78

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As far as I understand wrt CLKMUL pin (taken from Re: Detecting if a CPU is an AMD Am486 or an Intel i486 - general advice):
- Am486DX2: CLKMUL must be pulled low for proper operation (and I confirmed that floating or high does not work).
- Am486DX4 (original like (N)V8T): CLKMUL pulled high or floating, it operates in DX4 (3x) mode. Pulled low, then it operates in DX2 mode (2x mode).
- Am486DX4 (SV8B): CLKMUL pulled pulled high or floating, it operates in DX4 (3x) mode. Pulled low (like a DX2), then it operates in quad clock (4x) mode, just like a Am486DX5-133W16BGC.

@disruptor "Am486DX4 SV8B has to be jumpered like a DX4. It can be changed from write through operation to write back operation.": do you mean like an i486DX4 with the proper jumpering for WB mode? Maybe the MrBIOS enables the WB cache mode and the motherboard isn't properly jumpered for that. I'll look into that possibility.

Thanks for the replies šŸ˜€

Reply 6 of 6, by Disruptor

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Maybe your BIOS looks in its lookup table and decides to enable a WB configuration when it knows that the CPU type supports WB.
But what happens when it does not know the CPU type... in the 486 age incompatiblity may be found on the road from motherboard to CPU.

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