Cannot find any info on it. Can you post a picture of the back ?

Horun wrote on 2024-11-15, 15:51:

Cannot find any info on it. Can you post a picture of the back ?

Of course 😀

Came up blank here too. I can't imagine there were many multi I/O cards with the a 58167 RTC and a FDC card edge connector.

If you don't find any info, you can likely reverse engineer most of the stuff yourself, even without trying to draw a schematic of the full card. It's a quite typical late-80s XT I/O card. The empty socket near the bracket is meant for a second UART (like the NS8250N next to it) to support a second COM port. CN1 is the pin header for that second COM port, which means connecting a break-out cable to CN1 is pointless at the moment. CN2 is directly next to the NE558, which is the 4-channel timer required for a full-featured dual game port, so CN2 is the game port connector.

JP1 is most likely for IRQ selection. You can likely buzz out connections from the ISA IRQ pins to JP1 to find the resulting IRQs. Finding the IRQ sources that can be enabled using JP1 jumpers might turn out slightly more different, as the IRQ output of the NS8250N must not be directly routed to the ISA bus, but a tristate driver is needed in between. I have a similar card that uses a dedicated 74LS125 for driving the serial IRQs, but as I don't find that chip on your card, I expect the serial IRQs might be routed through the PAL, which makes finding out which serial port drives what IRQ source more difficult.

The DIP switches are right next to the PAL which will be used as I/O decoder, so these switches are used to enable/disable components and choose between "primary" and "secondary" address. For the parallel and the first serial port, you can observe the effect of changing the address or turning ports on/off using standard XT system info tools. For the clock, which might also have a selectable base address, you need an XT clock program. Knowing that the clock is an MM58167, you should be able to find a clock tool that is able to find the base address of the clock (or complain if the clock is disabled).

mkarcher wrote on 2024-11-15, 19:14:

If you don't find any info, you can likely reverse engineer most of the stuff yourself, even without trying to draw a schematic of the full card. It's a quite typical late-80s XT I/O card. The empty socket near the bracket is meant for a second UART (like the NS8250N next to it) to support a second COM port. CN1 is the pin header for that second COM port, which means connecting a break-out cable to CN1 is pointless at the moment. CN2 is directly next to the NE558, which is the 4-channel timer required for a full-featured dual game port, so CN2 is the game port connector.

JP1 is most likely for IRQ selection. You can likely buzz out connections from the ISA IRQ pins to JP1 to find the resulting IRQs. Finding the IRQ sources that can be enabled using JP1 jumpers might turn out slightly more different, as the IRQ output of the NS8250N must not be directly routed to the ISA bus, but a tristate driver is needed in between. I have a similar card that uses a dedicated 74LS125 for driving the serial IRQs, but as I don't find that chip on your card, I expect the serial IRQs might be routed through the PAL, which makes finding out which serial port drives what IRQ source more difficult.

The DIP switches are right next to the PAL which will be used as I/O decoder, so these switches are used to enable/disable components and choose between "primary" and "secondary" address. For the parallel and the first serial port, you can observe the effect of changing the address or turning ports on/off using standard XT system info tools. For the clock, which might also have a selectable base address, you need an XT clock program. Knowing that the clock is an MM58167, you should be able to find a clock tool that is able to find the base address of the clock (or complain if the clock is disabled).

Thank you, very helpful information. My oldest motherboard just started 😀