The extra 169th pin is just to key the CPU to socket. It should be internally not connected and CPU will work fine with it missing. Except of course the value of 487 is in having that pin. On-board 486SX is usually disabled with UP# on C11 (but it might also be a separate jumper). Which is actually missing on 487, since Intel was already playing games with customers back then and didn't want you to install a cheaper 486DX as an updgrade, you had to purchase 487. But it's just a few pins being swapped around, like FERR#, you could probably work around that with a few wires. Or there might be jumpers on newer mobos as well. In fact if all you run is well-behaved DOS software (nothing using FPU error reporting via the legacy pins) you can just jumper the mobo for 486DX and it should work with 487. Well provided you can install the CPU with the extra pin into the socket.

Deunan wrote on 2025-04-25, 13:17:

In fact if all you run is well-behaved DOS software (nothing using FPU error reporting via the legacy pins) you can just jumper the mobo for 486DX and it should work with 487.

I'm afraid that DOS software, as far as I know, entirely relies on the "legacy" mechanism to report FPU errors, as long as the DOS software cares about FPU errors at all. Most DOS software doesn't care about FPU error reporting and turns it off entirely, so all this software should work. But if DOS software depends on FPU error reporting, it will either use the legacy legacy method of the IBM5150 using NMI (which is emulated by the BIOS from IRQ13), or the legacy method of the IBM5170 (which triggers IRQ13). The Intel-recommended non-legacy method that is implemented internally in the 486 processor uses INT 10h as "coprocessor error", which conflicts with the use of INT 10h as video BIOS entry point.

This is why DOS/BIOS-compatible PC operating systems do not use the non-legacy method for FPU error reporting at all. You can start using it if you run a "virtual machine monitor" (which is kind of like a hypervisor, but in the 90s) that intercepts interrupts before they are forwarded into DOS code that runs in VM86 mode. I don't think EMM386 uses the non-legacy error reporting. Interestingly, Intel introduced INT 10h error reporting for coprocessor errors as early as in the 80186 (using a dedicated FPU error input pin), but IBM was unable to use this feature as they already used INT 10h for their own purpose.

So it doesn't seem like an easy todo on a motherboard that doesn't have the i487SX settings?

Interesting ! After digging thru my 486 boards manuals found just one that list the 487SX with jumper settings, the ECS AL486. Thought maybe had some others that listed it but no.
The cpu jumpers are all same as 486DX except one JP37 (short 1-2 instead of 2-3), that same jumper is left open for a 486sx...just rambling 😁
edit: ok found two more that list the 486sx, so only 3 out of my 17 boards....

H3nrik V! wrote on 2025-04-27, 20:34:

So it doesn't seem like an easy todo on a motherboard that doesn't have the i487SX settings?

Depends on what you want to do with it, and what is "easy" for you. Step 1 is getting a mobo with a socket that accepts PGA169. Actual support for i487SX is optional. That mobo should preferably have only an empty 486 socket, no 486SX soldered on it. But even that is not a huge issue.
Step 2 is disabling the on-board 486SX, if present at all. If there is a jumper for that - great. If not you'll need to solder a wire on the bottom of the socket for 487 (other places are possible but the socket will have the signal you need exposed).
Step 3 is setting the mobo for 486DX, plugging the 487 into it, and it should run. Unless of course the mobo does have settings for 487, in which case set that and skip next step.
Step 4, if the mobo doesn't run or (more likely) a particular program doesn't work properly due to missing FPU error reporting, another wire will be needed.

I think all 486 zif sockets (1,2 and 3) have the needed 169'th pin spot in corner. May not be wired depending on the mobo traces....