RayeR wrote on 2025-09-29, 04:06:
Sure, I didn't change anything else. I neither investigated how fcpu is detected in this case, this old CPUs doesn't have nothing like TSC so there's not much exact way to determine fcpu, maybe just by running some loop...
All cpu frequency mesaurement tools of that time used the programmable interval timer (Intel 8253/8254) to measure the time required to execute a fixed operation, possibly a loop. It's a well-known quirk of speedsys to get the CPU clock of Cyrix 486 processors low by a factor of 3. When I was young, I implemented a CPU speed measurement utility that executed a block of 64K NOP instructions, and assumed 3 cycles per NOP on any processor that does not have a writeable AC bit in EFLAGS, and 1 cycle per NOP on any processor that did have a writable AC bit. It worked on the small set of computers I had at hand. The idea is that NOP is specified as "3 cycles" on 8088-80386, and at "1 cycle" on the 486. Possibly, this works on the Pentium, too. Nevertheless, that algorithm will fail on the 8088, as it required 4 cycles per NOP to fetch the instructions. Just guessing: If speedsys also uses the block-of-NOP method, and if Cyrix didn't special case NOP (1 cycle) and still executes it as XCHG AX, AX (3 cycles), it would cause the symptom we observe.
