I had a bit of a go at it using ChatGPT. Much quicker and better documentation than me trying to write it down myself.

See the attached files and let me know if there is any more info that would help.

As I actually pay for a subscription, I might as well use it.

Other related thoughts:
Replacing a stick that makes the system not POST or causes a lockup during booting and putting the bad stick second so you can run diags can sometimes be useful.
For systems that support multiple channels, you will want to make sure to have the second stick in a slot that makes the system still only run in single-channel mode IF possible. Motherboard documentation should shed light on the correct config.

err-bits
To put it simply, for a single-sided 8 chip module, the bit determines the microchip.
The first digit on the right is the first chip, the second is the second, both are the first and second simultaneously.

ps. The image and idea are not mine; I have only heard that this is how it is done.

shevalier wrote on 2026-01-08, 06:59:

[img]https://ithardware.pl/artykuly/max/

cyclone3d wrote on 2026-01-08, 04:10:

After some reading I need to check on a different system if it fails in the same way.
Cpu and chipset affect how memory is mapped (if I'm not wrong, of course) (source: memtest www).

I need to do a very deep nose dive in this, it's not as straight forward as I thought. 😀

Thanks for the suggestions so far.
I thought I wouldn't have to go desoldering to get to the bottomo of it but it's for the science 🤣

I think it's possible to disable bad chips/banks in SPD EEPROM.
shevalier has already recommended some SPD Editors, but I haven't had time to test them yet.
Re: Modded 512MB DDR3 memory module?

ott wrote on 2026-01-08, 11:13:

I think it's possible to disable bad chips/banks in SPD EEPROM.
shevalier has already recommended some SPD Editors, but I haven't had time to test them yet.
Re: Modded 512MB DDR3 memory module?

I was looking into it. It's an interesting thing to check.
Thanks for the input

At least in the case of partially bad RAM modules that still allow the system to POST, if you are going to use those sticks in a computer that is going to run a Linux-based OS, you can make use of a Linux kernel feature called BadRAM.

It works in a similar way to how bad sectors on a hard drive are marked in a file system. You use a tool like Memtest to scan for faulty areas and then have it export a map of these areas and then you pass this map on in a BadRAM kernel parameter in whatever boot manager you use.

Once correctly configured, when you boot the system, the Linux kernel will reserve the defective RAM regions as if they were in use by a process, preventing those parts of the RAM from being used by the OS or allocated to any applications.

I don't know if any similar solutions exist for Windows and other operating systems, but at least in theory, any OS with memory protection could be made to support this. Even native DOS, lacking memory protection, could have some utility made for it to reserve faulty memory regions in a similar way. Perhaps such a feature could be integrated into Jemm.

9x can do it. You reserve the ram region in device manager.
I did a post a while back.

Easier to block 4kb than replace a chip.

That said, at 11gb this is way above anything 9x can use

I am not surprised someone did that 😀
Ram used to cost more than DDR5 now.

---

Does anyone know where the ram starts being used in POST and before BOOT happen? I still can't figure if it starts at the beginning or not.
I have a DDR2 stick that works if pressure is applied on a specific chip (balls have cracked), and needs a reballing. This is enough to make it work but if not it won't allow POST, codes stop at ram sizing.

Sizing operations must use a certain logic and if a fault happens it'll prevent further operations.

--

This is both an interesting and difficult topic.

Like, when is the ram initialised?

IIRC there's something like 'start in 16bit mode, check the cache, check the first n bytes of ram, if that's ok, set up a stack, load more biosy things, check the rest of the ram, load more advanced biosy things, etc

myne wrote on 2026-01-08, 13:28:

Like, when is the ram initialised?

IIRC there's something like 'start in 16bit mode, check the cache, check the first n bytes of ram, if that's ok, set up a stack, load more biosy things, check the rest of the ram, load more advanced biosy things, etc

So, if the SPD is faulty, no go.
If ram is faulty no go.

If both work on the BIOS needs (use good areas), it starts, but a memtest program can detect the issues.
Correct?
---

In my case:
1) DDR 1GB - faulty chip/s; ram required for bios and os are ok. (POSTs fine)
2) DDR2 1GB - faulty chip; must be in that bios range then? (No post)
3) Pc-xxx faulty: have to check both for faulty and spd?

This sounds somewhat interesting. All SPDs look like they have the same structure/template + the specific values.
If I find two ram sticks that are the same I could potentially swap the SPD chip and check what's wrong.

All this is science only, I'm not going to try this on the dozens of faulty sticks I have.

ott wrote on 2026-01-08, 11:13:

I think it's possible to disable bad chips/banks in SPD EEPROM.
shevalier has already recommended some SPD Editors, but I haven't had time to test them yet.
Re: Modded 512MB DDR3 memory module?

I haven't encountered any problems with DDR4/5 yet, but on DDR3 and earlier, it is impossible to disable a broken chip, only the bank/side.
However, DDR2/3 is still actively produced for routers and everything else.
This type of memory is not a replacement product for DDR4/5, so if prices for it have gone up, it's just stupid hype.
SDRAM is most often calculated directly, without taking SPD into account, and sometimes DDR1.
Therefore, I believe that messing around with SPD is pointless from a repair perspective.

Personally, I am interested in this because I have two PC133 256 MB dual-sided strips for 440BX.
It seems that one of them has a CL of ~2.1(~129MHz) and the other has a CL of ~2.3 (~125Mhz)
And yes, I know that SDRAM does not have fractional CL values, but the maximum operating frequency depends of CL.
I think the frequency is not being reached because of one bad chip.
I want to determine which ones exactly and replace them.
It will be strip CL2 Micron with one Hunix chip and a no-frills but functional Hunix with one Micron chip.
But I haven't had time to experiment yet, so I'm happy to see about other people's experiences.

Nexxen wrote on 2026-01-08, 14:36:

2) DDR2 1GB - faulty chip; must be in that bios range then? (No post)

DDR2 will definitely not work without the correct SPD.
DDR1 — 20%, most often on motherboards with SIS chipsets due to certain features of their BIOS.
Or, in some cases, on motherboards from other manufacturers.
I am almost certain that Intel/Dell/HP will not even work with SDRAM without the correct SPD.

Nexxen wrote on 2026-01-08, 14:36:

So, if the SPD is faulty, no go. If ram is faulty no go. […]
Show full quote

myne wrote on 2026-01-08, 13:28:

Like, when is the ram initialised?

IIRC there's something like 'start in 16bit mode, check the cache, check the first n bytes of ram, if that's ok, set up a stack, load more biosy things, check the rest of the ram, load more advanced biosy things, etc

So, if the SPD is faulty, no go.
If ram is faulty no go.

If both work on the BIOS needs (use good areas), it starts, but a memtest program can detect the issues.
Correct?
---

In my case:
1) DDR 1GB - faulty chip/s; ram required for bios and os are ok. (POSTs fine)
2) DDR2 1GB - faulty chip; must be in that bios range then? (No post)
3) Pc-xxx faulty: have to check both for faulty and spd?

This sounds somewhat interesting. All SPDs look like they have the same structure/template + the specific values.
If I find two ram sticks that are the same I could potentially swap the SPD chip and check what's wrong.

All this is science only, I'm not going to try this on the dozens of faulty sticks I have.

I think you're overthinking it.
From the above, it looks like there's only 1 single bad bit of the whole stick.
Just find a way to block that memory page in an os, and it should be fine.

Aren't newer x86 CPUs at least theoretically able to boot without any memory modules installed, by using the on-board CPU cache as RAM? I think I remember reading something about that.

Most BIOSes probably don't allow any OS to be booted with just the CPU cache being available as RAM. It will probably instead just show a "No RAM installed" error message and halt the system.

But at least in theory, a CPU cache RAM fallback could allow an OS kernel to boot and mark bad RAM regions as reserved, even if the first megabyte(s) of memory in the RAM modules is bad.

Or am I overlooking something?

myne wrote on 2026-01-08, 15:31:

I think you're overthinking it.
From the above, it looks like there's only 1 single bad bit of the whole stick.
Just find a way to block that memory page in an os, and it should be fine.

I'm trying to go from case study to more general.
SPD is interesting. Maybe it can go bad with bit rot.

At this time I'm just guessing stuff, it's the soul of this place in many cases 😀
Mine for sure.

Nexxen wrote on 2026-01-08, 15:59:

SPD is interesting.

The only applicable SPD modding is converting DDR3L to DDR3 for motherboards that do not want to boot with DDR3L.
Other manipulations are almost pointless, alas 🙁
To restore a damaged one, just load any similar firmware. Then set the timings you want in the BIOS.

shevalier wrote on 2026-01-08, 18:00:

The only applicable SPD modding is converting DDR3L to DDR3 for motherboards that do not want to boot with DDR3L. Other manipula […]
Show full quote

Nexxen wrote on 2026-01-08, 15:59:

SPD is interesting.

The only applicable SPD modding is converting DDR3L to DDR3 for motherboards that do not want to boot with DDR3L.
Other manipulations are almost pointless, alas 🙁
To restore a damaged one, just load any similar firmware. Then set the timings you want in the BIOS.

Thanks for the input!

Been through SPD data (somewhat).
Basically you need to know what chips are there and have all the data about them to create a new SPD image from scratch.
Not that easy, some vendors overwrite it with their logo (corsair for example).

Modifying looks easier, but playing with it will require a lot of time I don't want to spend.
Edit: changing size is another easy task. I wouldn't use funny sizes (IDK but I'm sure it'll bonk something 😀)
But I'll look more into it.