I was debugging a program and ran into an instruction that disassembles as "movsx eax,ax", but "movsx eax,al" is executed; which had me thinking there was a CPU bug for a moment. The opcode is 0F BE C0 with a disassembly template of "movsx %Gv,%Eb". The second operand is byte size in the template, so a 16-bit register there is a disassembly bug.

1static void reg_name(int regnum, char size)
2{
3  if (size == 'F') { /* floating point register? */
4    uprintf("st(%d)", regnum);
5    return;
6  }
7  if ((((size == 'c') || (size == 'v')) && (opsize == 32)) || (size == 'd'))
8    uputchar('e');
9- if ((size=='q' || size == 'b' || size=='c') && !wordop) {
10+ if (size == 'b' || ((size=='q' || size=='c') && !wordop)) {
11    uputchar("acdbacdb"[regnum]);
12    uputchar("llllhhhh"[regnum]);
13  } else {
14    uputchar("acdbsbsd"[regnum]);
15    uputchar("xxxxppii"[regnum]);
16  }
17}

It seems the wordop var is not applicable to %E operands, so the above change just trusts a byte size in the template regardless of the value of wordop. There are certainly other ways to correct the problem, but this way is fairly direct.