Those VIA CPUs seem to primarily be used for niche commercial and industrial applications. The C5's dedicated AES/RNG hardware makes their goals pretty clear there I think because they spent transistor budget on something essentially useless to desktop users.

sliderider wrote:

If you were actually encoding audio/video instead of just playing it back you would see a difference. I seem to recall the C3 be […]
Show full quote

If you were actually encoding audio/video instead of just playing it back you would see a difference. I seem to recall the C3 being weak in that area.

And I was right

http://www.tomshardware.com/reviews/VIA-s-C3- … -GHz,472-7.html

And in the business benchmarks it also falls short

http://www.tomshardware.com/reviews/VIA-s-C3- … -GHz,472-8.html

which is surprising since the C3 was marketed as a low power, low heat solution for businesses. You aren't saving anything with a chip that uses half the power but takes 4-5 times longer to do the work.

I didn't see listed what motherboard was used for those C3 tests? Of the 3 boards I tested, I found one didn't work at all, one was extremely sluggist, and one was very fast. The fast one was the TUSL2-C. Since I'm taking the Ultimate 686 Benchmark Comparison up to 600 MHz, I've added the VIA C3 Nehemiah at 66x9 (ram at 100 MHz).

feipoa wrote:

sliderider wrote:

If you were actually encoding audio/video instead of just playing it back you would see a difference. I seem to recall the C3 be […]
Show full quote

If you were actually encoding audio/video instead of just playing it back you would see a difference. I seem to recall the C3 being weak in that area.

And I was right

http://www.tomshardware.com/reviews/VIA-s-C3- … -GHz,472-7.html

And in the business benchmarks it also falls short

http://www.tomshardware.com/reviews/VIA-s-C3- … -GHz,472-8.html

which is surprising since the C3 was marketed as a low power, low heat solution for businesses. You aren't saving anything with a chip that uses half the power but takes 4-5 times longer to do the work.

I didn't see listed what motherboard was used for those C3 tests? Of the 3 boards I tested, I found one didn't work at all, one was extremely sluggist, and one was very fast. The fast one was the TUSL2-C. Since I'm taking the Ultimate 686 Benchmark Comparison up to 600 MHz, I've added the VIA C3 Nehemiah at 66x9 (ram at 100 MHz).

"Motherboard MSI MS-6368
VIA PLE133T Chipset"

feipoa wrote:

sliderider wrote:

If you were actually encoding audio/video instead of just playing it back you would see a difference. I seem to recall the C3 be […]
Show full quote

If you were actually encoding audio/video instead of just playing it back you would see a difference. I seem to recall the C3 being weak in that area.

And I was right

http://www.tomshardware.com/reviews/VIA-s-C3- … -GHz,472-7.html

And in the business benchmarks it also falls short

http://www.tomshardware.com/reviews/VIA-s-C3- … -GHz,472-8.html

which is surprising since the C3 was marketed as a low power, low heat solution for businesses. You aren't saving anything with a chip that uses half the power but takes 4-5 times longer to do the work.

I didn't see listed what motherboard was used for those C3 tests? Of the 3 boards I tested, I found one didn't work at all, one was extremely sluggist, and one was very fast. The fast one was the TUSL2-C. Since I'm taking the Ultimate 686 Benchmark Comparison up to 600 MHz, I've added the VIA C3 Nehemiah at 66x9 (ram at 100 MHz).

What would be really fascinating to see in terms of VIA-Cyrix parts would be a comparison of the preproduction Joshua Cyrix III core (686 derivative with enhanced FPU, 3DNow!, and 256kB L2), and comparisons of that with the late-gen 686 and the win-chip based Cyrix III.

Supposedly, VIA abandoned the original Cyrix design for cost (die size) and clock-scaling reasons . . . but given the very poor per-clock performance of the Centaur chip (let alone compared to the high per-clock integer performance of the Cyrix cores), that latter argument wouldn't seem to make much sense. (with 1/2 the per-clock performance -or less for some things- the clock-scaling advantage would be worthless aside from marketing purposes -a la P4) The poor per-clock FPU performance of the CIII also put it well behind the 686 FPU too (3DNow! aside).

-And on the grounds of cost/die-size, a big chunk of the Cyrix core's die was comprised of the 256 kB L2 cache (vs 128kL1 and no L2 on the Samuel core), so cutting back on the L2 cache of the Joshua design should have mitigated that issue as well. (plus, the actual 180 nm Samuel die was still 75 mm2 compared to 65 mm2 for the 180 nm MII -not sure about Joshua . . . though the 250 nm K6 was only 68 mm2, the 6-2 81 mm2, 6-III 118 mm2, and the 2+ and III+ both likely under 70 mm2 -which would make those chips considerably more cost effective than the Samuel or Joshua cores -even with the ~600 MHz stability ceiling . . . at least at 180 nm -and the 180 nm CIII topped at 800 MHz anyway)

I stumbled on some Cyrix insider commentary about the VIA buyout when looking up the MediaGX MXi that Sliderider posted about weeks ago. It sounds like Cyrix was a mess internally and their projects weren't looking good.

http://www.sos.mcmaster.ca/sp/CyrixComments.htm

sliderider wrote:

"Motherboard MSI MS-6368
VIA PLE133T Chipset"

The VIA Apollo Pro 133A (VT82C694X/VT82C686A) chipsetted board I tried wouldn't work with a VIA C3 Nehemiah, while another VIA Apollo Pro 133A motherboard (VT82C694X/VT82C596B) ran the Nehemiah, but it was very slow. I'm not sure if the PLE133T is any better, but the two Intel 815E chipsetted boards I tried worked great. Speedsys scored around 850.

@kool kitty89
The Nehemiah has a total of 192 KB, combined, L1/L2 cache. The manual mentions that later revision might have SMP support. I doubt this is the case, but I will test them for SMP when I have more time, that is, provided they work in any of my dual 370 boards (Asus CUV4X-DLS, Intel SAI2, SuperMicro P3TDDE, SuperMicro P3TDE6).

@swaaye
Fantastic little piece of Cyrix gossip you found!

via c3, all i know is that they are extremely fast in superpi! 😁

Fantastic, a new thread!

I ran the full 686 ensuite of benchmarks if anyone is interested in any particular test result. The system RAM seems a bit slow when the VIA is onboard. The PIII-600 was much faster with system memory, according to Speedsys. Any idea why that is? I am using CL3 PC133 RAM for all 4 tests. Attached is the VIA C3 at 1400, 1200, 600 and a PIII-600. Motherboad is an ASUS TUSL2-C.

For the VIA Apollo Pro 133A boards I tested, the speedsys score is a pathetic 66.2.

feipoa wrote:

@kool kitty89
The Nehemiah has a total of 192 KB, combined, L1/L2 cache. The manual mentions that later revision might have SMP support. I doubt this is the case, but I will test them for SMP when I have more time, that is, provided they work in any of my dual 370 boards (Asus CUV4X-DLS, Intel SAI2, SuperMicro P3TDDE, SuperMicro P3TDE6).

Right. I was only talking about the Samuel core with the 128k cache comment. (since it was that design that replaced the Cyrix based Joshua core)

swaaye wrote:

I stumbled on some Cyrix insider commentary about the VIA buyout when looking up the MediaGX MXi that Sliderider posted about weeks ago. It sounds like Cyrix was a mess internally and their projects weren't looking good.

http://www.sos.mcmaster.ca/sp/CyrixComments.htm

That may be true, but the Cyrix design at least got to the preproduction stages at 400 MHz (3x133) and was the initially planned VIA-Cyrix chip to be released.

That said, even with a working chip, having the engineering team a mess would have made things more questionable (in terms of continued development of the design -though they could have opted to outsource further R&D too). At very least, the Cyrix engineers (or whoever VIA had working on the designs in 2000) were capable enough to shift the MIII core from Socket 7 to 370 and apparently brought it to production quality. (though in some respects, moving exclusively to 370 was a mistake too -given SS7 was still the better lower cost option at the time, and low-cost was exactly the niche VIA was catering to -meaning AMD SS7 options were a much better value)

So is the MIII the Joshua? Was the Samuel also called the MIII? What is the MIII project that got canned, as mentioned in the web article that swaaye posted? Was Gopi the MXi?

For added comparison, I have included the Speedsys score from my dual PIII-850 slot 1 (440BX) machine. The dual PIII-850 scored 967, which is similar to the VIA C3-1400 score of 969. It is a pitty the Nehemiah's didn't come out 5 years earlier. Apparently Speedsys cannot identify a GeForce 6200 and some 2 TB SATA drives.

I did some digging...

Cayenne - Core chip for Cyrix MXi and Gobi.
Jedi - Former name for Cyrix Joshua (before Gobi).
Gobi - Former name for Cyrix Joshua.
Joshua - Former core for VIA Cyrix III (never finished).
MXi - Cyrix (NSM) integrated chip [Proprietary]
Jalapeno - Former codename for Cyrix Mojave.
Mojave - Cyrix M3 [Socket 370]
Serrano - Cyrix M4 [ ? ]

Joshua = Cyrix's Cyrix III
Samuel = Centaur's Cyrix III

MIII---
Cyrix's next-generation Mojave chip is based on the 0.18-micron 'Jalapeno' core and will start at 600MHz. It's a SoC like MediaGX. It features 256KB of on-chip Level 2 cache, an 11-stage deep-pipeline, a new floating point unit, a 3D graphics engine, 3DNow! and MMX instructions, support for DVD playback and a 3.2GBps memory interface (RAMBUS).

Even without excessive benchmarking - Via C3/C7/Transmeta Crusoe are frigging slow compared to Pentiums or AMD processors. However - for DOS or win95 games and appz they are still comparably fast. So if you buy some old thin client for 5 or 10 bucks on ebay you won't win any benchmark competitions but still end up with a neat machine that works fine as a "pseudo" retro PC.

there is still one big question that i never figured out:

we know that viac3 cores are based on idt design(old jushua test samples based on cyrix but cancelled), yet its performance-per-clock is far slower than even the original idt c6 on socket7 platform, why?

noshutdown wrote:

yet its performance-per-clock is far slower than even the original idt c6 on socket7 platform, why?

Do you have a benchmark chart showing this comparison? Sounds interesting. How did they underclock the VIA C3 Nehemiah to 233 MHz or less?

swaaye wrote:

I did some digging... […]
Show full quote

I did some digging...

Cayenne - Core chip for Cyrix MXi and Gobi.
Jedi - Former name for Cyrix Joshua (before Gobi).
Gobi - Former name for Cyrix Joshua.
Joshua - Former core for VIA Cyrix III (never finished).
MXi - Cyrix (NSM) integrated chip [Proprietary]
Jalapeno - Former codename for Cyrix Mojave.
Mojave - Cyrix M3 [Socket 370]
Serrano - Cyrix M4 [ ? ]

Joshua = Cyrix's Cyrix III
Samuel = Centaur's Cyrix III

MIII---
Cyrix's next-generation Mojave chip is based on the 0.18-micron 'Jalapeno' core and will start at 600MHz. It's a SoC like MediaGX. It features 256KB of on-chip Level 2 cache, an 11-stage deep-pipeline, a new floating point unit, a 3D graphics engine, 3DNow! and MMX instructions, support for DVD playback and a 3.2GBps memory interface (RAMBUS).

It was my impression that the Jalapeno chip was an SoC using a proprietary form factor (as with GX and MXi), but the Mojave/M3 was the conventional desktop counterpart to that. (intended for Super Socket 7 and/or Socket 370)
And that, in turn, became the Joshua core used in the preproduction VIA Cyrix III.

I think the 11-stage pipeline comment is also a mistake as the M3 and other 6x86 based designs were still relying on the old 7-stage superpipelined architecture based on the original 6x86 -which would have been the main contributing factor to limited clock speed scalability, rather like the K6-2+/III+. (the Centaur design did use an 11 stage pipeline though, so that's probably where the confusion comes from)

A WinXP screenshot showing System Information, System Properties, GPU-Z, and CPU-Z has been added to my post with all those Speedsys screenshots. It was too large, 1280x1024, so its listed as a clickable link.

The interesting bit from the System Information, is that part of the identifier is still listed as CentaurHauls. So I wonder if any of the Winchip guys made it on over to VIA and remained around until this Nehemiah was produced?

feipoa wrote:

noshutdown wrote:

yet its performance-per-clock is far slower than even the original idt c6 on socket7 platform, why?

Do you have a benchmark chart showing this comparison? Sounds interesting. How did they underclock the VIA C3 Nehemiah to 233 MHz or less?

why do i need to run them at same clock? just check the superpi records on hwbot.org, and you will find idt c6s running at 300 is not far from a Nehemiah at 1g.

Could you let us know what the SuperPi times were for both processors, how many digits of pi were calculated, and what motherboards were used. I've noticed that some motherboards are extremely sluggish when the Nehemiah is installed.

With the C3 Nehemiah at 1200 MHz, running SuperPi with 128K digits, I get 44.2 seconds. For a Pentium P55C 262 MMX, I get a SuperPi score of 52.8 seconds. A Cyrix MII 292 MHz scores at 52 seconds. I haven't yet run the Winchips to see how hey do. My PIII-850 has a SuperPi score of 16.2 seconds for 128K.

I think I see what you mean though, the C3 Nehemiah at such a high clock rate is far behind the Pentiums PIII's. I have not come to any FPU conclusions on the Nehemiah yet, but I suspect the overall FPU score may be around a PII-450.

I had a Maxterm Maxspeed Thin Client box, it was based on the C3 Nehamiah core running at 800MHz.

It had a mini-ITX form factor motherboard with a CF 2 IDE adapter.

I got it for free and stuck in a second NIC to create a little PFsense VPN Router out of it for a few years.

It ran fine until the onboard NIC fried, but otherwise was a fine piece of hardware for this function.

The reason I was able to get it free is that the POS company I work for had recycled many of the older pieces of equipment from customer sites and we had a few of these lying about for testing purposes.

They were running Windows XP, not the embedded version but the full version, as client/customer order taking terminals.

Too bad I was only allowed to take one as there were 6 or 8 of them lying about but others grabbed them too 😉