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VIA C3/C7 Discussion

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Reply 20 of 49, by noshutdown

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feipoa wrote:

I think I see what you mean though, the C3 Nehemiah at such a high clock rate is far behind the Pentiums PIII's. I have not come to any FPU conclusions on the Nehemiah yet, but I suspect the overall FPU score may be around a PII-450.

that must be joking. p2-450 on bx mainboard would easily get 4 minutes, while nehemiah-1g struggles at around 9 minutes, which is 10% faster than previous samule core.
and now i am talking about comparision between viac3 and its ancestor idt c6... hwbot is down now but i remember that idt c6-300 took not much more than 10 minutes, while pentium-133 is around 17 minutes.

Reply 21 of 49, by feipoa

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X minutes for how many digits of Pi are you refering to? I can run my own Pi tests on a board known to work well with the Nehemiah; just let me know how many digits you are talking about. I can also run IDT C6 Pi tests.

Keep in mind that the calculation of Pi decimals is only one FPU test. You will really want to average over several different types of FPU tests to get a good idea for how well the FPU works.

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Reply 23 of 49, by feipoa

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When you say meg, I assume you are referring to mega, that is, 1 x 10^6, or 1 million digits.

Via C3 Nehemiah 1.4 Ghz, SuperPi, 1 Million decimal places
7 min, 1 sec

PIII Coppermine 850 MHz, SuperPi, 1 Million decimal places
3 min, 9 sec

IDT C6 Winchip
I'll do this when I'm at that stage in the Ultimate 686 Benchmark Comparison.

Anyone know what speed Pentium gets 7 min. in SuperPi, 1 million digits?

I still do not think SuperPi is the end all in terms of FPU and gaming performance. While I have not yet finished the Ultimate 686 Benchmark Comparison, I did run the C3 at 1.2 GHz in Quake 2 at 640x480, software mode, and it got 37.3 FPS. A P54C 262 MHz scored 13.7 FPS in the same test, albiet at a different FSB, 75 MHz vs. 133 MHz. Firmers answers to come after more testing.

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Reply 24 of 49, by noshutdown

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my p3-s 1.4ghz and 815e mainboard gets 96~97 seconds, of course my rig is fully wired tight.
on the same mainboard, my coppermine-celeron engineer sample(unlocked multiplier) running at 66*4 is under 7 minutes.

Reply 25 of 49, by noshutdown

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hwbot is back online so i dug it up
idt c6 at 250mhz took less than 13 minutes, not much longer than a viac3 at 1g, right?
http://www.hwbot.org/submission/877943_qwerty … min_54sec_100ms

Reply 26 of 49, by swaaye

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It seems like they deprioritized whatever instructions SuperPi uses. I'd guess that C3 is mainly targeted at office applications just like previous Cyrix and Centaur CPUs. I wonder what the results of a Winstone benchmark comparison would be...

Reply 27 of 49, by sliderider

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swaaye wrote:

It seems like they deprioritized whatever instructions SuperPi uses. I'd guess that C3 is mainly targeted at office applications just like previous Cyrix and Centaur CPUs. I wonder what the results of a Winstone benchmark comparison would be...

In SiSoft Sandra 2002, the C3 does not perform well at all given it's clock speed. I linked to it in a previous post.

Reply 28 of 49, by swaaye

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Sandra tests aren't business benchmarks. Those, like SuperPi, are synthetic tests running a loop of some sort (often AMD/Intel-tuned assembly) that doesn't necessarily mean anything for application performance.

Winstone results: (looks less terrible)
http://www.bluesmoke.net/review45_6.html

I see wildly varying results around the web though. I have a feeling that, like Feipoa is seeing, that few motherboards work properly with the VIA CPUs.

Reply 29 of 49, by noshutdown

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swaaye wrote:
Sandra tests aren't business benchmarks. Those, like SuperPi, are synthetic tests running a loop of some sort (often AMD/Intel-t […]
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Sandra tests aren't business benchmarks. Those, like SuperPi, are synthetic tests running a loop of some sort (often AMD/Intel-tuned assembly) that doesn't necessarily mean anything for application performance.

Winstone results: (looks less terrible)
http://www.bluesmoke.net/review45_6.html

I see wildly varying results around the web though. I have a feeling that, like Feipoa is seeing, that few motherboards work properly with the VIA CPUs.

try a floatpoint-intensive game benchmark then... quake2 software for example, 3dmark may do too but only with a video card fast enough(ti4600 or higher recommended), or it would be limited by the card.
and like celerons, viac3s have different cores. my guess is that samuel and ezra are compatible with coppermine(bx, 815, 694), while ezra-t and nehemiah are compatible with tualatin(815-b, 694-t).

Reply 30 of 49, by kool kitty89

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swaaye wrote:
Sandra tests aren't business benchmarks. Those, like SuperPi, are synthetic tests running a loop of some sort (often AMD/Intel-t […]
Show full quote

Sandra tests aren't business benchmarks. Those, like SuperPi, are synthetic tests running a loop of some sort (often AMD/Intel-tuned assembly) that doesn't necessarily mean anything for application performance.

Winstone results: (looks less terrible)
http://www.bluesmoke.net/review45_6.html

I see wildly varying results around the web though. I have a feeling that, like Feipoa is seeing, that few motherboards work properly with the VIA CPUs.

Just a guess, but it would seem logical that the late-generation VIA chipset based Socket 370 boards would be the most likely to properly support the VIA CPUs. (though its certainly possible that even many of those are problematic -depending on other variables set by the board manufacturer, etc)

Likewise, it would stand to reason that earlier VIA CPUs would have more compatible motherboards available than later chips. (at least for revisions/models with significant changes to the architecture)

swaaye wrote:

It seems like they deprioritized whatever instructions SuperPi uses. I'd guess that C3 is mainly targeted at office applications just like previous Cyrix and Centaur CPUs. I wonder what the results of a Winstone benchmark comparison would be...

I'd gotten the same impression on the Centaur design philosophy in general, but I'd thought Cyrix took a somewhat different approach.
Aside from heavily focusing on high per-clock performance, I'd gotten the impression that the Cyrix chips had heavy optimization for all ALU operations rather than the more selective approach IDT took. (except that Cyrix did optimize particularly heavily for 16-bit operations -especially on the original 6x86, with more 32-bit emphasis on the M2- but still generally strong per-clock performance emphasis across the board for integer operations)

I'd also gotten the impression that that design philosophy contributed to Cyrix's difficulty in scaling up clock speeds on the 6x86 cores (due to complex layers of logic -in addition to the relatively short pipeline) as well as the larger die size than the K6 (somewhat like the K5). Though the lag in moving beyond 350 nm tech obviously was a big problem too. (the K6 probably would have been in a similar board had AMD not switched to 250 nm when they did . . . the PII may have had similar problems for that matter, in spite of the longer pipeline -the 350 nm PI never went beyond 266 MHz officially)

Reply 31 of 49, by sliderider

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kool kitty89 wrote:
Just a guess, but it would seem logical that the late-generation VIA chipset based Socket 370 boards would be the most likely to […]
Show full quote
swaaye wrote:
Sandra tests aren't business benchmarks. Those, like SuperPi, are synthetic tests running a loop of some sort (often AMD/Intel-t […]
Show full quote

Sandra tests aren't business benchmarks. Those, like SuperPi, are synthetic tests running a loop of some sort (often AMD/Intel-tuned assembly) that doesn't necessarily mean anything for application performance.

Winstone results: (looks less terrible)
http://www.bluesmoke.net/review45_6.html

I see wildly varying results around the web though. I have a feeling that, like Feipoa is seeing, that few motherboards work properly with the VIA CPUs.

Just a guess, but it would seem logical that the late-generation VIA chipset based Socket 370 boards would be the most likely to properly support the VIA CPUs. (though its certainly possible that even many of those are problematic -depending on other variables set by the board manufacturer, etc)

Likewise, it would stand to reason that earlier VIA CPUs would have more compatible motherboards available than later chips. (at least for revisions/models with significant changes to the architecture)

swaaye wrote:

It seems like they deprioritized whatever instructions SuperPi uses. I'd guess that C3 is mainly targeted at office applications just like previous Cyrix and Centaur CPUs. I wonder what the results of a Winstone benchmark comparison would be...

I'd gotten the same impression on the Centaur design philosophy in general, but I'd thought Cyrix took a somewhat different approach.
Aside from heavily focusing on high per-clock performance, I'd gotten the impression that the Cyrix chips had heavy optimization for all ALU operations rather than the more selective approach IDT took. (except that Cyrix did optimize particularly heavily for 16-bit operations -especially on the original 6x86, with more 32-bit emphasis on the M2- but still generally strong per-clock performance emphasis across the board for integer operations)

I'd also gotten the impression that that design philosophy contributed to Cyrix's difficulty in scaling up clock speeds on the 6x86 cores (due to complex layers of logic -in addition to the relatively short pipeline) as well as the larger die size than the K6 (somewhat like the K5). Though the lag in moving beyond 350 nm tech obviously was a big problem too. (the K6 probably would have been in a similar board had AMD not switched to 250 nm when they did . . . the PII may have had similar problems for that matter, in spite of the longer pipeline -the 350 nm PI never went beyond 266 MHz officially)

If they were designing them for higher per clock performance, then why are they slower than Celerons at the same speed? It looks like the performance per clock is lower if it can't keep up with a Celeron, not higher.

Reply 32 of 49, by kool kitty89

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sliderider wrote:

If they were designing them for higher per clock performance, then why are they slower than Celerons at the same speed? It looks like the performance per clock is lower if it can't keep up with a Celeron, not higher.

I was talking about the 6x86 and 6x86MX/MII (per the previous "Cyrix and Centaur" comment) which should indeed have better per-clock integer performance than any other x86 chip of the time, except the K5.

The floating point performance was the big disadvantage for the Cyrix chips compared to Intel and AMD parts (from the K6 onward), and the lower clock speeds made the gap more extreme as well (PR ratings were legitimate for integer performance, but they also widened the FPU performance gap substantially -ie a 133 MHz PR166 wasn't that much worse than a Pentium 133 FPU but was far worse than a P5 166 -though, interestingly, since the old 5x86 used the same FPU, the 120 MHz PR-90 actually performed relatively close to a Pentium 90 in FPU and ALU -since both were proportionally slower on the 5x86 with its simpler integer section).
The lack of floating-point SIMD didn't help either.

Centaur Winchip cores OTOH were always slow and relatively simple logic-wise (similar to the 486 in many respects and weaker than Cyrix's own 5x86/MediaGX core). They relied purely on clock-speed, decent sized on-chip cache and competitive front-end I/O performance along with small die size and low power usage to remain attractive -along with not requiring split-rail voltage and often being compatible with older boards. (and that clock-speed reliance also became a serious problem when the C6 failed to scale up well in spite of its cool running small die and relatively high core voltage -in that respect, faring worse than the Cyrix MII on top of the much poorer per-clock performance)

Also like the 486, the FPUs in the Centaur chips are slow (much slower than the Cyrix one even and not much better than the original 486's -which itself is several times slower than the Cyrix M1/M2 FPU), albeit they did adopt floating-point SIMD extensions with 3DNOW and SSE. (and for the vanilla FPU of the original winchip, you've got the absolute worst socket 5/7 CPU for floating point intensive applications)

Reply 33 of 49, by feipoa

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kool kitty89 wrote:

Just a guess, but it would seem logical that the late-generation VIA chipset based Socket 370 boards would be the most likely to properly support the VIA CPUs.

This was also my original thinking, but according to my testing, even brand name boards have issues with Nehemiah.

I specifically sourced a Gigabyte GA-6VX7-4X containing the VIA Apollo Pro 133A chipset (694X) because the manual specifically mentions jumper settings for the Cyrix III 550 (5.5x100), Cyrix III 533 (4x133), and Cyrix III 600 (4.5x133). The manual, however, lists these CPUs as "Optional" and doesn't clarify what is meant by that. With the latest BIOS flashed, the Nehemiah still didn't function properly in this board.

Since everyone is talking benchmarks, I will list out the VIA C3 Nehemiah 1200 MHz benchmarks using an ASUS TUSL2-C. Since I was considering tagging the marks onto the Ultimate 686 Benchmark Comparison, the graphics card (Matrox Millenniun G200) may be the bottleneck with some of these benchmarks. I will throw in a GeForce 6200 and re-run these sometime. Plrease refer to the test results for the completed CPUs of the Ultimate 486 Benchmark Comparison in the Cyrix MII-433 Build thread. There's a PDF in there somewhere with updated results. Nevermind, it would be too troublesome to poke through that, so I've included the results for the Cyrix MII-292 (83 MHz FSB).

Curiously, I mentioned the ASUS TUSL2-C being a pretty good board in another thread about 2 weeks ago, at which time there were still about 8 for sale on eBay. Now there are none. Coincidence?

DOS
Norton Sysinfo v8.0 - crashed (Cyrix MII-292 MHz = 86.7 - exceeded upper limit)
Landmark v2.0 - ALU: 12072, FPU: 3405 (MII-292= 3612/3884)
ByteMark - ALU - 1052% of a P90, FPU: 597% of a P90 (MII-292= 392/217)
RLB Dhrystone - 1536 (MII-292 = 448)
RLB Whetstone - 219 (MII-292 = 137)
Speedsys - 836 (MII-292 = 208)
Cachechk v7.0 - L1: 5058 MB/s, L2: 1263 MB/s (MII-292 = 1216/253)
3DBench 1.0c - 358 (MII-292 = 402) - WHAT HAPPENED HERE?
Doom 1.9s Timedemo1 - 123 (MII-292 = 118)
PcpBench - 38.6 (MII-292 = 34)
Quake1 Timedemo 1 at 640x480 - 21.7 fps (MII-292 = 16.7)

Windows 98SE

SuperPi (128K digits) - 44.2 sec (MII-292 = 52)
Winbench96, CPUMark32 - 1970 (MII-292 = 659)
Winbench96, Graphics Winmark - 142 (MII-292 = 85.4)
Winbench99, CPUMark99 - 76.4 (MII-292 = 23.5)
Winbench99, FPUMark - 2670 (MII-292 = 648)
3DWinbench97 - 422 (MII-292 = 122)
WinTune98 - ALU: 2111, FPU: 306, RAM: 1642 (MII-292 = 713/233/355)
Sandra99 - ALU: 2509, FPU: 410, RAM ALU: 251, RAM FPU: 340 (MII-292 = 748/257/112/115)
PassMark v4 - Math: 92.2, MMX: 105 (MII-292 = 23.9/31.9)
3DMark99Max - For some reason doesn't detect MMX and scores low, like a non-MMX Cyrix
Final Reality Software - 2.98 (MII-292 = 1.29)
MDK Performance Software - 300 (MII-292 = 99)
Quake2 at 640x480, Software - 37.3 (MII-292 = 12.5)

Plan your life wisely, you'll be dead before you know it.

Reply 35 of 49, by feipoa

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I don't know. I only bothered to source the late generation Nehemiah since it was the best of VIA's production efforts for socket 370. Anyone with other VIA's chips, please feel free to contribute to this mini comparison.

Plan your life wisely, you'll be dead before you know it.

Reply 36 of 49, by kool kitty89

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feipoa wrote:

I don't know. I only bothered to source the late generation Nehemiah since it was the best of VIA's production efforts for socket 370. Anyone with other VIA's chips, please feel free to contribute to this mini comparison.

From the comments and links poster earlier in this thread, it seems like those late model VIA parts were aimed more at niche applications than as mainstream CPUs (especially for the C7), so that could indeed show a discrepancy with the earlier C3/Cyrix III parts that were aimed more as low-cost desktop/laptop CPUs. (in the same way the older Winchips were)

Reply 37 of 49, by sliderider

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feipoa wrote:

I don't know. I only bothered to source the late generation Nehemiah since it was the best of VIA's production efforts for socket 370. Anyone with other VIA's chips, please feel free to contribute to this mini comparison.

Where did you find a C7 in PPGA? I only ever find them in BGA.

Reply 38 of 49, by kool kitty89

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sliderider wrote:
feipoa wrote:

I don't know. I only bothered to source the late generation Nehemiah since it was the best of VIA's production efforts for socket 370. Anyone with other VIA's chips, please feel free to contribute to this mini comparison.

Where did you find a C7 in PPGA? I only ever find them in BGA.

AFIK he's been talking about a Nehemiah C3 (which went up to 1.4 GHz), not a C7. (it's also not a PPGA, like most other socketed C3/Cyrix III parts, it's a ceramic FCPGA)

On the note of the C7 though, it seems to have been produced in socket mobile 478 and 479 in addition to BGA.

Reply 39 of 49, by feipoa

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Yes, I am referring to a C3 Nehemiah in the CPGA form-factor.
http://www.chipdb.org/img-cyrix-via-c3-1.2aghz-2311.htm

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