First post, by feipoa
- Rank
- l33t++
I have run across comments in the forum which mention that VLB-only systems are faster than PCI-only systems or that PCI systems with VLB are the slowest. I ran a few DOS benchmarks to see what truth would come of it. I was also wondering if the VLB slot on PCI+VLB motherboards is just as fast as on a VLB-only board. Also, if PCI performance on PCI+VLB boards is gimped, is it due to the revision of the chipset? If it is due to the chipset revision, then one might believe that PCI-only motherboards with the same chipset revision are also gimped.
For VLB graphics, I used a Diamond Stealth64 VRAM w/220 MHz RAMDAC, 4MB RAM, and is based on an S3 Vision968 chipset. For the PCI graphics card, I used an S3 Trio64V2/DX w/2MB. How does the Trio64V2/DX compare to the Vision968 in general? Unfortunately, I did not have an S3 Vision968 PCI card to test.
Specifications
VLB-only-SiS
Asus VL/I-486SV2GX4 rev. 2.0
SiS 471 ST
1024 KB cache / 64 MB RAM
Diamond Stealth64 VRAM - S3 Vision968 4 MB
VLB+PCI
Asus PVI-486SP3 rev. 1.8
SiS 496 NV / 497 NU
256-512 KB cache, 32-64 MB RAM
Diamond Stealth64 VRAM - S3 Vision968 4 MB
Trio64V2/DX 2 MB
PCI-only-SiS-1
Chaintech 486SPM rev. M104
SiS 496 NV / 497 NU
1024 KB cache / 64 MB RAM
Trio64V2/DX 2 MB
PCI-only-SiS-2
MSI MS-4144 rev. 2.1
SiS 496 OR / 497 OT
1024 KB cache / 64 MB RAM
Trio64V2/DX 2 MB
VLB-only-UMC
PC Chips M912 rev. 1.7
UMC Um4980
512 KB cache / 64 MB RAM
Diamond Stealth64 VRAM - S3 Vision968 4 MB
PCI-only-UMC
Biostar MB-8433 UUD v2.0
UMC Um8881F / UM8886BF
256 KB cache / 32 MB RAM
Trio64V2/DX 2 MB
Notes
Landmark version 2 was used, along with Quake 1.06 timedemo 1 and DOOM timedemo 3. All systems employed an AMD Am5x86 at 160 MHz and were run at 3.6V. L1 and L2 were set to write-back mode. VESA wait state was set to 0 WS, but with the "delay" jumper shorted. Adaptec AHA-2842A with Seagate ST32171N SCSI hard drive.
Cachechk v7
PCI-only-SiS
L1 = 165 MB/s
L2 = 74.5 MB/s
RAM read = 51.3 MB/s
RAM write = 83.3 MB/s
VLB-only-SiS
L1 = 165 MB/s
L2 = 74.5 MB/s
RAM read = 51.3 MB/s
RAM write = 83.3 MB/s
VLB+PCI
L1 = 165 MB/s
L2 = 74.5 MB/s
RAM read = 39.3 MB/s
RAM write = 83.3 MB/s
For the VLB+PCI system, the RAM Read speed was only 39.3 MB/s. This is because the "cache write cycle" had to be set to "3 CCLK" instead of "2 CCLK" on VLB+PCI motherboard, otherwise the system would not boot. Perhaps this is the source of the gimped performance? I tried running the VLB+PCI board with 256KB and 512 KB cache and with 32-64 MB RAM, however the performance stayed the same. I tried 256 KB double-banked + 32 MB in a hope that this would allow for setting the 'cache write cycle' to 2 CCLKs, but it did not. All of the latest BIOS versions were used.
VLB-only-UMC
L1 = 165 MB/s
L2 = 74.6 MB/s
RAM read = 44.5 MB/s
RAM write = 41.7 MB/s
PCI-only-UMC
L1 = 165 MB/s
L2 = 74.5 MB/s
RAM read = 47.7 MB/s
RAM write = 83.3 MB/s
Conclusion
1) PCI performance on the VLB+PCI system is definitely gimped. I used an oscilloscope connected to the PCI bus to ensure there wasn't an automatic PCI divisor. There was not.
2) VLB performance of the VLB+PCI system is worse than that of the VLB-only-SiS system.
3) PCI-only-SiS systems outperformed the VLB-only-SiS system in every instance except for the Landmark test. I wonder what Landmark is testing for and why the VLB-only-SiS system came out ahead? Even more curious is why the VLB+PCI system was the top performer. Did the PCI-only-SiS systems outperform the VLB-only-SiS system because the S3 Trio64V2/DX is much faster than the S3 Vision968?
4) The PCI-only-SiS-1 motherboard contains the same revision of the SiS chipset as the VLB+PCI motherboard, however the PCI-only-SiS-1 system outperformed the VLB+PCI system. This implies that the particular revision of the SiS 496 chipset is not to blame for the gimped PCI performance. The reduction in performance is related to the VL-to-PCI bridge, which can probably be disabled via chipset registers. With that in mind, I wonder if it would be possible to increase PCI performance on the VLB+PCI systems by disabling VLB in the chipset registers?
5) The overall performance of the VLB-only-UMC system is less than that of the VLB-only-SiS sytem and only slightly better than the VLB+PCI system.
6) The performance of the PCI-only-UMC system is slower than that of the VLB-only-SiS system.
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