PowerPC Optimizations \ VOGONS

PowerPC Optimizations

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First post, by MasterShadrack

Posted on 2005-03-19, 20:11

MasterShadrack Offline

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Rank: Newbie
Posts: 1
Joined: 2005-03-19, 20:00

I was looking into using my G5 to run old games. By looking at the source code, I noticed that Endianess is handled with bit-shifting operations. However, the PowerPC architecture, from the beginning, supported Endian correction instructions. I changed "include/mem.h" to handle this particular case. I tought that an DosBox developper could integrate it into the product. Here my little modifications:

1#ifdef WORDS_BIGENDIAN
2
3INLINE Bit8u host_readb(HostPt off) {
4	return off[0];
5};
6INLINE Bit16u host_readw(HostPt off) {
7#if defined(__ppc__) && defined(__GNUC__)
8  unsigned long result;
9  __asm__ volatile ("lhbrx %0, 0, %1" 
10		    /* outputs:  */ : "=r" (result) 
11		    /* inputs:   */ : "r" (off) 
12		    /* clobbers: */ : "memory");
13  return result;
14#else
15	return off[0] | (off[1] << 8);
16#endif
17};
18INLINE Bit32u host_readd(HostPt off) {
19#if defined(__ppc__) && defined(__GNUC__)
20  unsigned long result;
21  __asm__ volatile ("lwbrx %0, 0, %1" 
22		    /* outputs:  */ : "=r" (result) 
23		    /* inputs:   */ : "r" (off) 
24		    /* clobbers: */ : "memory");
25  return result;
26#else
27	return off[0] | (off[1] << 8) | (off[2] << 16) | (off[3] << 24);
28#endif
29};
30INLINE void host_writeb(HostPt off,Bit8u val) {
31	off[0]=val;
32};
33INLINE void host_writew(HostPt off,Bit16u val) {
34#if defined(__ppc__) && defined(__GNUC__)
35  __asm__ ("sthbrx %0, 0, %1" :
36		    /* inputs:   */ : "r" (val),
37		                      "r" (off) 
38		    /* clobbers: */ : "memory");
39#else
40	off[0]=(Bit8u)(val);
41	off[1]=(Bit8u)(val >> 8);
42#endif
43};
44INLINE void host_writed(HostPt off,Bit32u val) {
45#if defined(__ppc__) && defined(__GNUC__)
46  __asm__ ("stwbrx %0, 0, %1" :
47		    /* inputs:   */ : "r" (val),
48		                      "r" (off) 
49		    /* clobbers: */ : "memory");
50#else
51	off[0]=(Bit8u)(val);
52	off[1]=(Bit8u)(val >> 8);
53	off[2]=(Bit8u)(val >> 16);
54	off[3]=(Bit8u)(val >> 24);
55#endif
56};
57
58#define MLEB(_MLE_VAL_) (_MLE_VAL_)
59
60INLINE Bit16u MLEW(Bit16u val) {

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61#if defined(__ppc__) && defined(__GNUC__)
62  unsigned long result;
63  __asm__ volatile ("lhbrx %0, 0, %1" 
64		    /* outputs:  */ : "=r" (result) 
65		    /* inputs:   */ : "r" (&val) 
66		    /* clobbers: */ : "memory");
67  return result;
68#else
69	return (_MLE_VAL_ >> 8) | (_MLE_VAL_ << 8);
70#endif
71}; 
72
73INLINE Bit32u MLED(Bit32u val) {
74#if defined(__ppc__) && defined(__GNUC__)
75  unsigned long result;
76  __asm__ volatile ("lwbrx %0, 0, %1" 
77		    /* outputs:  */ : "=r" (result) 
78		    /* inputs:   */ : "r" (&val) 
79		    /* clobbers: */ : "memory");
80  return result;
81#else
82	return ((_MLE_VAL_ >> 24)|((_MLE_VAL_ >> 8)&0xFF00)|((_MLE_VAL_ << 8)&0xFF0000)|((_MLE_VAL_ << 24)&0xFF000000));
83#endif
84};
85
86#else
87// Little-Endian empty translators
88#endif

I played my old KQ3 games with those modification without any noticable bug. Hope that help.

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