After that I also tried it with one of my Pentium MMX processors, 200 or 233MHz (P55C): The TR12 switches no longer had any effect.
I have to correct myself here. I just tried out all my Pentium MMX processors with the SetMul TR12 options, while benching them with SpeedSys before and after.
Pentium MMX 233 SL27S 5.4.3
Pentium MMX 200 SL26J 5.4.4
Pentium MMX 200 SL27J 5.4.3
Pentium MMX 166 SL27H 5.4.3
Pentium MMX 166 SY059 5.4.4
Pentium MMX 166 SL239 5.4.4 (Ceramic one)
They all slow down considerably with all five of the TR12 features disabled! From 90..157 SpeedSys points to 24..27 points. 😮
Sadly, in retesting my Pentium 120 cpu with the test registers, I found DCD and CCD (data and code cache) have no effect. These two switches are what allow my POD 200MMX to get into 486 levels of performance. VPD and BPD do work, which allow smaller performance drops into P90 and P100 ranges.
I ran the test with the same six processors, but this time using only the parameters 'CCD DCD'. All processors slowed down from 90..157 SpeedSys points to 32..30 points.