SMSW EAX stores all of CR0 into EAX. STR and SLDT do what you'd expect.

Hmmmm.... Bochs seems to agree on SMSW. But it does support 32-bit registers on STR and SLDT?

1if (i->modC0()) {
2303     if (i->os32L()) {
3304       BX_WRITE_32BIT_REGZ(i->dst(), val16);
4305     }
5306     else {
6307       BX_WRITE_16BIT_REG(i->dst(), val16);
7308     }
8309   }
9310   else {
10311     bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
11312     /* pointer, segment address pair */
12313     write_virtual_word(i->seg(), eaddr, val16);
13314   }

Is that invalid on a 80[3/4]86?

IBMulator seems to verify said behaviour of SMSW, STR and SLDT as well?

It's cpu dependent. From the IA32 manual "Outside IA-32e mode, when the destination operand is a 32-bit register, the 16-bit segment selector is copied into the low-order 16 bits of the register. The high-order 16 bits of the register are cleared for the Pentium 4, Intel Xeon, and P6 family processors. They are undefined for Pentium, Intel486, and Intel386 processors. When the destination operand is a memory location, the segment selector is written to memory as a 16-bit quantity, regardless of the operand size." What "undefined" means you'd have to test on a real machine.

crazyc wrote:

What "undefined" means you'd have to test on a real machine.

On 486dx:

• SMSW stores CR0
• STR, SLDT, MOV SR: upper 16 bits are cleared