alvaro84 wrote:Mut wrote:
How can it have 5 pieces of 4-bit RAM chips? 😲
It uses the 4 bit chips to do 8 bits. So a 44256 (4x256k) becomes 8x128k
For every memory read, do two read accesses
Set the most significant bit of the address to 1 (the rest of the address bits are connected to the CPU)
Read the 4 bit value, and store it in a 4 bit latch
Set the most significant bit of the address to 0
Enable a buffer which has bits b0-b3 connected to the RAM, and bits b4-b8 connected to the latch.
For every memory write, do two write accesses
Set the most significant bit to 1, and use a multiplexer (e.g. 74LS157) to send data bits b4-b8 to the RAM, and send a write pulse to the RAM
Set the most significant bit to 0, and use the multiplexer (e.g. 74LS157) to send data bits b0-b3 to the RAM, and send a write pulse to the RAM.
In order for this to work, you either need fast memory, or a slow CPU.
You only need one lot of control circuitry regardless of the number of RAM devices.
The same technique was used on the Acorn Electron which used a single 4464 (64kx4) device to provide 32kBytes of RAM. (https://en.wikipedia.org/wiki/Acorn_Electron)
The 6502 ran at 2MHz when executing from ROM, but ran at 1MHz when accessing RAM. The RAM was accessed at a rate of 2MHz, but every byte required two accesses.