First post, by melbar
melbar
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It is possible to use both pipeline burst caches, when there is a 256kb onboard pipelined burst cache and you install an additional 256kb COAST stick?
See: Table 7.8, chapter 7, page 241
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Example mainboard is the soyo 5te2.
#1 K6-2/500, #2 Athlon1200, #3 Celeron1000A, #4 A64-3700, #5 P4HT-3200, #6 P4-2800, #7 Am486DX2-66