1void et34k_updateDAC(SVGA_ET34K_DATA* et34kdata, byte val)
2{
3	et34kdata->hicolorDACcommand = val; //Apply the command!
4	//bits 3-4 redirect to the DAC mask register.
5	//bit 0 is set if bits 5-7 is 1 or 3, cleared otherwise(R/O)
6	//bits 1-2 are stored, but unused.
7	//All generic handling of the ET3K/ET4K Hi-color DAC!
8	if (((val & 0xE0) == 0x20) || ((val & 0xE0) == 0x60)) //Set bit 0?
9	{
10		et34kdata->hicolorDACcommand |= 1; //Set!
11	}
12	else //Clear bit 0?
13	{
14		et34kdata->hicolorDACcommand &= ~1; //Clear!
15	}
16	//et34kdata->hicolorDACcommand |= 6; //Always set bits 1-2?
17	//getActiveVGA()->registers->DACMaskRegister = (getActiveVGA()->registers->DACMaskRegister&~0x18)|(et34kdata->hicolorDACcommand&0x18);
18	et34kdata->hicolorDACcommand &= ~0x18; //Ignore the shared bits for the result!
19}

1	//16-bit DAC support(Sierra SC11487)!
2	case 0x3C6: //DAC Mask Register? Pixel Mask/Command Register in the manual.
3		if (et34kdata->hicolorDACcmdmode<=3)
4		{
5			et34kdata->hicolorDACcmdmode = 0; //Stop looking?
6			return 0; //Execute normally!
7		}
8		//16-bit DAC operations!
9		et34k_updateDAC(et34kdata,val); //Update the DAC values to be compatible!
10		et34kdata->hicolorDACcmdmode = 0; //Disable command mode!
11		VGA_calcprecalcs(getActiveVGA(),WHEREUPDATED_DACMASKREGISTER); //We've been updated!
12		//et34kdata->hicolorDACcmdmode = 0; //A write to any address will reset the flag that is set when the pixel read mask register is read four times.
13		return 1; //We're overridden!
14		break;
15	case 0x3C7: //Write: DAC Address Read Mode Register	ADDRESS? Pallette RAM read address register in the manual.
16	case 0x3C8: //DAC Address Write Mode Register		ADDRESS? Pallette RAM write address register in the manual.
17	case 0x3C9: //DAC Data Register				DATA? Pallette RAM in the manual.
18		et34kdata->hicolorDACcmdmode = 0; //Disable command mode!
19		return 0; //Normal execution!
20		break;

1		//16-bit DAC support(Sierra SC11487)!
2	case 0x3C6: //DAC Mask Register?
3		if (et34kdata->hicolorDACcmdmode<=3)
4		{
5			++et34kdata->hicolorDACcmdmode;
6			return 0; //Execute normally!
7		}
8		else
9		{
10			*result = et34kdata->hicolorDACcommand;
11			*result |= (getActiveVGA()->registers->DACMaskRegister&0x18); //Add in the shared bits!
12			return 1; //Handled!
13		}
14		break;
15	case 0x3C7: //Write: DAC Address Read Mode Register	ADDRESS? Pallette RAM read address register in the manual.
16	case 0x3C8: //DAC Address Write Mode Register		ADDRESS? Pallette RAM write address register in the manual.
17	case 0x3C9: //DAC Data Register				DATA? Pallette RAM in the manual.
18		et34kdata->hicolorDACcmdmode = 0; //Disable command mode!
19		return 0; //Execute normally!
20		break;