mothergoose729 wrote on 2021-01-22, 07:08:
It would be pretty cool to have an FPGA drop in CPU for socket 7 or slot 1 that could be configured on the fly for different speed profiles.
For CPUs beyond slow 486sx FPGA is a no no, at least in "budget" models who power things like the MiSTER. An extra problem with Budget models, is that them waste silicon space and element count in ARM or PPC cores you will never use for a project like an FPGA based x86 CPU. To get in the levels of the Celeron-400MHz mendocino CPU, you would require some super expensive (and probably only available to certain markets), FPGA-only (with no core shit wasting silicon space/element count) chip like the Virtex or Stratix families... And even then, you would only go as far as Celeron Mendocino/K6-2s and that's probably the limit with the technology we have now. Totally not worth since you can get these CPUs as ASICs for pennies.
Now, a middle range FPGA-only chip, like middle-high line Cyclone's or Spartan's would be nice toys to attempt to make your own Pentium/K6 chipset... probably a 440lx if you push them far enough. You would be closer to something affordable to work your VHDL core code with, but still is something too expensive for many.